From: Bjorn Helgaas <helgaas@kernel.org>
To: Serge Semin <Sergey.Semin@baikalelectronics.ru>
Cc: "Rob Herring" <robh@kernel.org>,
"Bjorn Helgaas" <bhelgaas@google.com>,
"Lorenzo Pieralisi" <lorenzo.pieralisi@arm.com>,
"Jingoo Han" <jingoohan1@gmail.com>,
"Gustavo Pimentel" <gustavo.pimentel@synopsys.com>,
"Lorenzo Pieralisi" <lpieralisi@kernel.org>,
"Krzysztof Wilczyński" <kw@linux.com>,
"Serge Semin" <fancer.lancer@gmail.com>,
"Alexey Malahov" <Alexey.Malahov@baikalelectronics.ru>,
"Pavel Parkhomenko" <Pavel.Parkhomenko@baikalelectronics.ru>,
"Frank Li" <Frank.Li@nxp.com>,
"Manivannan Sadhasivam" <manivannan.sadhasivam@linaro.org>,
linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org,
"Jonathan Chocron" <jonnyc@amazon.com>,
"Kishon Vijay Abraham I" <kishon@ti.com>
Subject: Re: [PATCH RESEND v5 03/18] PCI: dwc: Disable outbound windows for controllers with iATU
Date: Mon, 27 Jun 2022 17:40:58 -0500 [thread overview]
Message-ID: <20220627224058.GA1784787@bhelgaas> (raw)
In-Reply-To: <20220624143428.8334-4-Sergey.Semin@baikalelectronics.ru>
[+cc Jonathan for pcie-al.c, Kishon for pci-keystone.c]
On Fri, Jun 24, 2022 at 05:34:13PM +0300, Serge Semin wrote:
> In accordance with the dw_pcie_setup_rc() method semantics and judging by
> what the comment added in commit dd193929d91e ("PCI: designware: Explain
> why we don't program ATU for some platforms") states there are DWC
> PCIe-available platforms like Keystone (pci-keystone.c) or Amazon's
> Annapurna Labs (pcie-al.c) which don't have the DW PCIe internal ATU
> enabled and use it's own address translation approach implemented. In
> these cases at the very least there is no point in touching the DW PCIe
> iATU CSRs. Moreover depending on the vendor-specific address translation
> implementation it might be even erroneous. So let's move the iATU windows
> disabling procedure to being under the corresponding conditional statement
> clause thus performing that procedure only if the iATU is expected to be
> available on the platform.
Added Jonathan and Kishon to make sure pcie-al.c and pci-keystone.c
(the only two drivers that override the default dw_child_pcie_ops)
won't be broken by skipping the outbound window disable.
> Fixes: 458ad06c4cdd ("PCI: dwc: Ensure all outbound ATU windows are reset")
> Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru>
> Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
> Tested-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
> Reviewed-by: Rob Herring <robh@kernel.org>
> ---
> drivers/pci/controller/dwc/pcie-designware-host.c | 14 ++++++++------
> 1 file changed, 8 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/pci/controller/dwc/pcie-designware-host.c b/drivers/pci/controller/dwc/pcie-designware-host.c
> index bc9a7df130ef..d4326aae5a32 100644
> --- a/drivers/pci/controller/dwc/pcie-designware-host.c
> +++ b/drivers/pci/controller/dwc/pcie-designware-host.c
> @@ -543,7 +543,6 @@ static struct pci_ops dw_pcie_ops = {
>
> void dw_pcie_setup_rc(struct pcie_port *pp)
> {
> - int i;
> u32 val, ctrl, num_ctrls;
> struct dw_pcie *pci = to_dw_pcie_from_pp(pp);
>
> @@ -594,19 +593,22 @@ void dw_pcie_setup_rc(struct pcie_port *pp)
> PCI_COMMAND_MASTER | PCI_COMMAND_SERR;
> dw_pcie_writel_dbi(pci, PCI_COMMAND, val);
>
> - /* Ensure all outbound windows are disabled so there are multiple matches */
> - for (i = 0; i < pci->num_ob_windows; i++)
> - dw_pcie_disable_atu(pci, i, DW_PCIE_REGION_OUTBOUND);
> -
> /*
> * If the platform provides its own child bus config accesses, it means
> * the platform uses its own address translation component rather than
> * ATU, so we should not program the ATU here.
> */
> if (pp->bridge->child_ops == &dw_child_pcie_ops) {
> - int atu_idx = 0;
> + int i, atu_idx = 0;
> struct resource_entry *entry;
>
> + /*
> + * Ensure all outbound windows are disabled so there are
> + * multiple matches
I know you only moved this comment and didn't change the wording, but
do you know what it means? What "multiple matches" is it talking
about, and why are they important?
I guess Rob previously moved it with 458ad06c4cdd ("PCI: dwc: Ensure
all outbound ATU windows are reset") [1], and it looks like maybe the
point is to *avoid* having an outbound transaction match multiple
windows? So maybe this comment should say this?
Disable all outbound windows to make sure a transaction can't match
multiple windows.
[1] https://git.kernel.org/linus/458ad06c4cdd
> + */
> + for (i = 0; i < pci->num_ob_windows; i++)
> + dw_pcie_disable_atu(pci, i, DW_PCIE_REGION_OUTBOUND);
> +
> /* Get last memory resource entry */
> resource_list_for_each_entry(entry, &pp->bridge->windows) {
> if (resource_type(entry->res) != IORESOURCE_MEM)
> --
> 2.35.1
>
next prev parent reply other threads:[~2022-06-27 22:41 UTC|newest]
Thread overview: 37+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-06-24 14:34 [PATCH RESEND v5 00/18] PCI: dwc: Various fixes and cleanups Serge Semin
2022-06-24 14:34 ` [PATCH RESEND v5 01/18] PCI: dwc: Stop link in the host init error and de-initialization Serge Semin
2022-06-24 14:34 ` [PATCH RESEND v5 02/18] PCI: dwc: Add unroll iATU space support to the regions disable method Serge Semin
2022-06-24 14:34 ` [PATCH RESEND v5 03/18] PCI: dwc: Disable outbound windows for controllers with iATU Serge Semin
2022-06-27 22:40 ` Bjorn Helgaas [this message]
2022-06-28 11:42 ` Serge Semin
2022-06-24 14:34 ` [PATCH RESEND v5 04/18] PCI: dwc: Set INCREASE_REGION_SIZE flag based on limit address Serge Semin
2022-06-24 14:34 ` [PATCH RESEND v5 05/18] PCI: dwc: Deallocate EPC memory on EP init error Serge Semin
2022-06-28 6:35 ` Manivannan Sadhasivam
2022-06-24 14:34 ` [PATCH RESEND v5 06/18] PCI: dwc: Enable CDM-check independently from the num_lanes value Serge Semin
2022-06-28 6:37 ` Manivannan Sadhasivam
2022-06-24 14:34 ` [PATCH RESEND v5 07/18] PCI: dwc: Add braces to the multi-line if-else statements Serge Semin
2022-06-24 14:34 ` [PATCH RESEND v5 08/18] PCI: dwc: Add trailing new-line literals to the log messages Serge Semin
2022-06-24 14:34 ` [PATCH RESEND v5 09/18] PCI: dwc: Discard IP-core version checking on unrolled iATU detection Serge Semin
2022-06-24 14:34 ` [PATCH RESEND v5 10/18] PCI: dwc: Convert Link-up status method to using dw_pcie_readl_dbi() Serge Semin
2022-06-24 14:34 ` [PATCH RESEND v5 11/18] PCI: dwc: Organize local variables usage Serge Semin
2022-06-28 6:38 ` Manivannan Sadhasivam
2022-06-28 23:33 ` Bjorn Helgaas
2022-06-29 2:03 ` Serge Semin
2022-06-24 14:34 ` [PATCH RESEND v5 12/18] PCI: dwc: Re-use local pointer to the resource data Serge Semin
2022-06-28 6:39 ` Manivannan Sadhasivam
2022-06-24 14:34 ` [PATCH RESEND v5 13/18] PCI: dwc: Add start_link/stop_link inliners Serge Semin
2022-06-28 6:43 ` Manivannan Sadhasivam
2022-06-24 14:34 ` [PATCH RESEND v5 14/18] PCI: dwc: Move io_cfg_atu_shared to the Root Port descriptor Serge Semin
2022-06-28 6:44 ` Manivannan Sadhasivam
2022-06-24 14:34 ` [PATCH RESEND v5 15/18] PCI: dwc: Add dw_ prefix to the pcie_port structure name Serge Semin
2022-06-27 11:47 ` Jesper Nilsson
2022-06-27 12:16 ` Neil Armstrong
2022-06-28 6:46 ` Manivannan Sadhasivam
2022-06-24 14:34 ` [PATCH RESEND v5 16/18] PCI: dwc-plat: Simplify the probe method return value handling Serge Semin
2022-06-24 14:34 ` [PATCH RESEND v5 17/18] PCI: dwc-plat: Discard unused regmap pointer Serge Semin
2022-06-24 14:34 ` [PATCH RESEND v5 18/18] PCI: dwc-plat: Drop dw_plat_pcie_of_match forward declaration Serge Semin
2022-06-28 6:58 ` [PATCH RESEND v5 00/18] PCI: dwc: Various fixes and cleanups Manivannan Sadhasivam
2022-06-28 11:57 ` Serge Semin
2022-06-28 23:35 ` Bjorn Helgaas
2022-06-29 1:38 ` Serge Semin
2022-07-11 18:40 ` Serge Semin
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20220627224058.GA1784787@bhelgaas \
--to=helgaas@kernel.org \
--cc=Alexey.Malahov@baikalelectronics.ru \
--cc=Frank.Li@nxp.com \
--cc=Pavel.Parkhomenko@baikalelectronics.ru \
--cc=Sergey.Semin@baikalelectronics.ru \
--cc=bhelgaas@google.com \
--cc=fancer.lancer@gmail.com \
--cc=gustavo.pimentel@synopsys.com \
--cc=jingoohan1@gmail.com \
--cc=jonnyc@amazon.com \
--cc=kishon@ti.com \
--cc=kw@linux.com \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-pci@vger.kernel.org \
--cc=lorenzo.pieralisi@arm.com \
--cc=lpieralisi@kernel.org \
--cc=manivannan.sadhasivam@linaro.org \
--cc=robh@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).