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From: Lu Baolu <baolu.lu@linux.intel.com>
To: Joerg Roedel <joro@8bytes.org>, Jason Gunthorpe <jgg@nvidia.com>,
	Christoph Hellwig <hch@infradead.org>,
	Bjorn Helgaas <bhelgaas@google.com>,
	Kevin Tian <kevin.tian@intel.com>,
	Ashok Raj <ashok.raj@intel.com>, Will Deacon <will@kernel.org>,
	Robin Murphy <robin.murphy@arm.com>,
	Jean-Philippe Brucker <jean-philippe@linaro.com>,
	Dave Jiang <dave.jiang@intel.com>, Vinod Koul <vkoul@kernel.org>
Cc: Eric Auger <eric.auger@redhat.com>, Liu Yi L <yi.l.liu@intel.com>,
	Jacob jun Pan <jacob.jun.pan@intel.com>,
	Zhangfei Gao <zhangfei.gao@linaro.org>,
	Zhu Tony <tony.zhu@intel.com>,
	iommu@lists.linux.dev, linux-pci@vger.kernel.org,
	linux-kernel@vger.kernel.org, Lu Baolu <baolu.lu@linux.intel.com>,
	Jean-Philippe Brucker <jean-philippe@linaro.org>
Subject: [PATCH v11 08/13] arm-smmu-v3/sva: Add SVA domain support
Date: Wed, 17 Aug 2022 09:20:19 +0800	[thread overview]
Message-ID: <20220817012024.3251276-9-baolu.lu@linux.intel.com> (raw)
In-Reply-To: <20220817012024.3251276-1-baolu.lu@linux.intel.com>

Add support for SVA domain allocation and provide an SVA-specific
iommu_domain_ops. This implementation is based on the existing SVA
code. Possible cleanup and refactoring are left for incremental
changes later.

Signed-off-by: Lu Baolu <baolu.lu@linux.intel.com>
Reviewed-by: Jean-Philippe Brucker <jean-philippe@linaro.org>
---
 drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h   |  6 ++
 .../iommu/arm/arm-smmu-v3/arm-smmu-v3-sva.c   | 76 +++++++++++++++++++
 drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c   |  3 +
 3 files changed, 85 insertions(+)

diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h
index d2ba86470c42..96399dd3a67a 100644
--- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h
+++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h
@@ -758,6 +758,7 @@ struct iommu_sva *arm_smmu_sva_bind(struct device *dev, struct mm_struct *mm);
 void arm_smmu_sva_unbind(struct iommu_sva *handle);
 u32 arm_smmu_sva_get_pasid(struct iommu_sva *handle);
 void arm_smmu_sva_notifier_synchronize(void);
+struct iommu_domain *arm_smmu_sva_domain_alloc(void);
 #else /* CONFIG_ARM_SMMU_V3_SVA */
 static inline bool arm_smmu_sva_supported(struct arm_smmu_device *smmu)
 {
@@ -803,5 +804,10 @@ static inline u32 arm_smmu_sva_get_pasid(struct iommu_sva *handle)
 }
 
 static inline void arm_smmu_sva_notifier_synchronize(void) {}
+
+static inline struct iommu_domain *arm_smmu_sva_domain_alloc(void)
+{
+	return NULL;
+}
 #endif /* CONFIG_ARM_SMMU_V3_SVA */
 #endif /* _ARM_SMMU_V3_H */
diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-sva.c b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-sva.c
index f155d406c5d5..43564b61c726 100644
--- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-sva.c
+++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-sva.c
@@ -549,3 +549,79 @@ void arm_smmu_sva_notifier_synchronize(void)
 	 */
 	mmu_notifier_synchronize();
 }
+
+static void arm_smmu_sva_block_dev_pasid(struct iommu_domain *domain,
+					 struct device *dev, ioasid_t id)
+{
+	struct mm_struct *mm = domain->mm;
+	struct arm_smmu_bond *bond = NULL, *t;
+	struct arm_smmu_master *master = dev_iommu_priv_get(dev);
+
+	mutex_lock(&sva_lock);
+	list_for_each_entry(t, &master->bonds, list) {
+		if (t->mm == mm) {
+			bond = t;
+			break;
+		}
+	}
+
+	if (!WARN_ON(!bond) && refcount_dec_and_test(&bond->refs)) {
+		list_del(&bond->list);
+		arm_smmu_mmu_notifier_put(bond->smmu_mn);
+		kfree(bond);
+	}
+	mutex_unlock(&sva_lock);
+}
+
+static int arm_smmu_sva_set_dev_pasid(struct iommu_domain *domain,
+				      struct device *dev, ioasid_t id)
+{
+	int ret = 0;
+	struct mm_struct *mm;
+	struct iommu_sva *handle;
+
+	/*
+	 * Detach the domain if a blocking domain is set. Check the
+	 * right domain type once the IOMMU driver supports a real
+	 * blocking domain.
+	 */
+	if (!domain || domain->type == IOMMU_DOMAIN_UNMANAGED) {
+		domain = iommu_get_domain_for_dev_pasid(dev, id);
+		if (!domain)
+			return -EINVAL;
+		arm_smmu_sva_block_dev_pasid(domain, dev, id);
+
+		return 0;
+	}
+
+	mm = domain->mm;
+	mutex_lock(&sva_lock);
+	handle = __arm_smmu_sva_bind(dev, mm);
+	if (IS_ERR(handle))
+		ret = PTR_ERR(handle);
+	mutex_unlock(&sva_lock);
+
+	return ret;
+}
+
+static void arm_smmu_sva_domain_free(struct iommu_domain *domain)
+{
+	kfree(domain);
+}
+
+static const struct iommu_domain_ops arm_smmu_sva_domain_ops = {
+	.set_dev_pasid		= arm_smmu_sva_set_dev_pasid,
+	.free			= arm_smmu_sva_domain_free,
+};
+
+struct iommu_domain *arm_smmu_sva_domain_alloc(void)
+{
+	struct iommu_domain *domain;
+
+	domain = kzalloc(sizeof(*domain), GFP_KERNEL);
+	if (!domain)
+		return NULL;
+	domain->ops = &arm_smmu_sva_domain_ops;
+
+	return domain;
+}
diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
index f88541be8213..057f7c8824d7 100644
--- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
+++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
@@ -2008,6 +2008,9 @@ static struct iommu_domain *arm_smmu_domain_alloc(unsigned type)
 {
 	struct arm_smmu_domain *smmu_domain;
 
+	if (type == IOMMU_DOMAIN_SVA)
+		return arm_smmu_sva_domain_alloc();
+
 	if (type != IOMMU_DOMAIN_UNMANAGED &&
 	    type != IOMMU_DOMAIN_DMA &&
 	    type != IOMMU_DOMAIN_DMA_FQ &&
-- 
2.25.1


  parent reply	other threads:[~2022-08-17  1:26 UTC|newest]

Thread overview: 33+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-08-17  1:20 [PATCH v11 00/13] iommu: SVA and IOPF refactoring Lu Baolu
2022-08-17  1:20 ` [PATCH v11 01/13] iommu: Add max_pasids field in struct iommu_device Lu Baolu
2022-08-17  1:20 ` [PATCH v11 02/13] iommu: Add max_pasids field in struct dev_iommu Lu Baolu
2022-08-17  1:20 ` [PATCH v11 03/13] iommu: Remove SVM_FLAG_SUPERVISOR_MODE support Lu Baolu
2022-08-17  1:20 ` [PATCH v11 04/13] PCI: Allow PASID only when ACS enforced on upstreaming path Lu Baolu
2022-08-17 21:17   ` Bjorn Helgaas
2022-08-17 22:48     ` Jason Gunthorpe
2022-08-18 11:55       ` Baolu Lu
2022-08-18 11:53     ` Baolu Lu
2022-08-18 23:00       ` Bjorn Helgaas
2022-08-22  7:43         ` Ethan Zhao
2022-08-23  7:05         ` Baolu Lu
2022-08-24 16:23           ` Bjorn Helgaas
2022-08-18 13:04   ` Jason Gunthorpe
2022-08-23  7:10     ` Baolu Lu
2022-08-17  1:20 ` [PATCH v11 05/13] iommu: Add attach/detach_dev_pasid iommu interface Lu Baolu
2022-08-18 13:33   ` Jason Gunthorpe
2022-08-23  7:30     ` Baolu Lu
2022-08-17  1:20 ` [PATCH v11 06/13] iommu: Add IOMMU SVA domain support Lu Baolu
2022-08-17  1:20 ` [PATCH v11 07/13] iommu/vt-d: Add " Lu Baolu
2022-08-18 13:36   ` Jason Gunthorpe
2022-08-23  7:33     ` Baolu Lu
2022-08-17  1:20 ` Lu Baolu [this message]
2022-08-17  1:20 ` [PATCH v11 09/13] iommu/sva: Refactoring iommu_sva_bind/unbind_device() Lu Baolu
2022-08-18 13:41   ` Jason Gunthorpe
2022-08-23 10:12     ` Baolu Lu
2022-08-17  1:20 ` [PATCH v11 10/13] iommu: Remove SVA related callbacks from iommu ops Lu Baolu
2022-08-17  1:20 ` [PATCH v11 11/13] iommu: Prepare IOMMU domain for IOPF Lu Baolu
2022-08-17  1:20 ` [PATCH v11 12/13] iommu: Per-domain I/O page fault handling Lu Baolu
2022-08-17  1:20 ` [PATCH v11 13/13] iommu: Rename iommu-sva-lib.{c,h} Lu Baolu
2022-08-22  4:49 ` [PATCH v11 00/13] iommu: SVA and IOPF refactoring Zhangfei Gao
2022-08-23  7:00   ` Baolu Lu
2022-08-26  4:17 ` Baolu Lu

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