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[66.90.144.107]) by smtp.gmail.com with ESMTPSA id u34-20020a056870d5a200b00122520b2176sm507366oao.31.2022.08.31.14.28.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 31 Aug 2022 14:28:11 -0700 (PDT) Received: (nullmailer pid 281996 invoked by uid 1000); Wed, 31 Aug 2022 21:28:10 -0000 Date: Wed, 31 Aug 2022 16:28:10 -0500 From: Rob Herring To: Serge Semin Cc: Krzysztof Kozlowski , Alexey Malahov , Lorenzo Pieralisi , Jingoo Han , Manivannan Sadhasivam , Rob Herring , Krzysztof =?utf-8?Q?Wilczy=C5=84ski?= , Frank Li , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Serge Semin , Gustavo Pimentel , linux-pci@vger.kernel.org, Pavel Parkhomenko , Bjorn Helgaas Subject: Re: [PATCH v5 14/20] dt-bindings: PCI: dwc: Add Baikal-T1 PCIe Root Port bindings Message-ID: <20220831212810.GA281963-robh@kernel.org> References: <20220822184701.25246-1-Sergey.Semin@baikalelectronics.ru> <20220822184701.25246-15-Sergey.Semin@baikalelectronics.ru> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20220822184701.25246-15-Sergey.Semin@baikalelectronics.ru> Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org On Mon, 22 Aug 2022 21:46:55 +0300, Serge Semin wrote: > Baikal-T1 SoC is equipped with DWC PCIe v4.60a Root Port controller, which > link can be trained to work on up to Gen.3 speed over up to x4 lanes. The > controller is supposed to be fed up with four clock sources: DBI > peripheral clock, AXI application Tx/Rx clocks and external PHY/core > reference clock generating the 100MHz signal. In addition to that the > platform provide a way to reset each part of the controller: > sticky/non-sticky bits, host controller core, PIPE interface, PCS/PHY and > Hot/Power reset signal. The Root Port controller is equipped with multiple > IRQ lines like MSI, system AER, PME, HP, Bandwidth change, Link > equalization request and eDMA ones. The registers space is accessed over > the DBI interface. There can be no more than four inbound or outbound iATU > windows configured. > > Signed-off-by: Serge Semin > > --- > > Changelog v2: > - Rename 'syscon' property to 'baikal,bt1-syscon'. > - Fix the 'compatible' property definition to being more specific about > what strings are supposed to be used. Due to that we had to add the > select property to evaluate the schema against the Baikal-T1 PCIe DT > nodes only. > > Changelog v5: > - Drop generic fallback names from the compatible property constraints. > (@Rob) > - Define ordered {reg,interrupt,clock,reset}-names properties. (@Rob) > - Drop minItems from the clocks and reset properties, since it equals > to the maxItems for them. > - Drop num-ob-windows and num-ib-windows properties constraint. (@Rob) > --- > .../bindings/pci/baikal,bt1-pcie.yaml | 153 ++++++++++++++++++ > 1 file changed, 153 insertions(+) > create mode 100644 Documentation/devicetree/bindings/pci/baikal,bt1-pcie.yaml > Reviewed-by: Rob Herring