From: Matt Ranostay <mranostay@ti.com>
To: <kishon@ti.com>, <vigneshr@ti.com>, <bhelgaas@google.com>,
<robh@kernel.org>, <lpieralisi@kernel.org>
Cc: <linux-arm-kernel@lists.infradead.org>,
<linux-pci@vger.kernel.org>, <nm@ti.com>,
Matt Ranostay <mranostay@ti.com>
Subject: [PATCH v2 1/3] PCI: j721e: Add PCIe 4x lane selection support
Date: Mon, 26 Sep 2022 10:55:36 -0700 [thread overview]
Message-ID: <20220926175538.362018-2-mranostay@ti.com> (raw)
In-Reply-To: <20220926175538.362018-1-mranostay@ti.com>
Add support for setting of two-bit field that allows selection of 4x
lane PCIe which was previously limited to only 2x lanes.
Cc: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Matt Ranostay <mranostay@ti.com>
---
drivers/pci/controller/cadence/pci-j721e.c | 7 +++++--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/drivers/pci/controller/cadence/pci-j721e.c b/drivers/pci/controller/cadence/pci-j721e.c
index a82f845cc4b5..d9b1527421c3 100644
--- a/drivers/pci/controller/cadence/pci-j721e.c
+++ b/drivers/pci/controller/cadence/pci-j721e.c
@@ -43,7 +43,6 @@ enum link_status {
};
#define J721E_MODE_RC BIT(7)
-#define LANE_COUNT_MASK BIT(8)
#define LANE_COUNT(n) ((n) << 8)
#define GENERATION_SEL_MASK GENMASK(1, 0)
@@ -207,11 +206,15 @@ static int j721e_pcie_set_lane_count(struct j721e_pcie *pcie,
{
struct device *dev = pcie->cdns_pcie->dev;
u32 lanes = pcie->num_lanes;
+ u32 mask = GENMASK(8, 8);
u32 val = 0;
int ret;
+ if (lanes == 4)
+ mask = GENMASK(9, 8);
+
val = LANE_COUNT(lanes - 1);
- ret = regmap_update_bits(syscon, offset, LANE_COUNT_MASK, val);
+ ret = regmap_update_bits(syscon, offset, mask, val);
if (ret)
dev_err(dev, "failed to set link count\n");
--
2.38.0.rc0.52.gdda7228a83
next prev parent reply other threads:[~2022-09-26 18:10 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-09-26 17:55 [PATCH v2 0/3] PCI: add 4x lane support for pci-j721e controllers Matt Ranostay
2022-09-26 17:55 ` Matt Ranostay [this message]
2022-09-26 17:55 ` [PATCH v2 2/3] PCI: j721e: Add per platform maximum lane settings Matt Ranostay
2022-09-26 17:55 ` [PATCH v2 3/3] PCI: j721e: Add warnings on num-lanes misconfiguration Matt Ranostay
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