Re: [PATCH v3 2/2] PCI: Distribute available resources for root buses too

[Jonathan Cameron <Jonathan.Cameron@Huawei.com>]

On Wed, 30 Nov 2022 13:22:21 +0200
Mika Westerberg <mika.westerberg@linux.intel.com> wrote:

> Previously we distributed spare resources only upon hot-add, so if the
> initial root bus scan found devices that had not been fully configured by
> the BIOS, we allocated only enough resources to cover what was then
> present. If some of those devices were hotplug bridges, we did not leave
> any additional resource space for future expansion.
> 
> Distribute the available resources for root buses, too, to make this work
> the same way as the normal hotplug case.
> 
> Link: https://bugzilla.kernel.org/show_bug.cgi?id=216000
> Link: https://lore.kernel.org/r/20220905080232.36087-5-mika.westerberg@linux.intel.com
> Reported-by: Chris Chiu <chris.chiu@canonical.com>
> Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
> ---
> This is a new version of the patch after the revert due to the regression
> reported by Jonathan Cameron. This one changes pci_bridge_resources_not_assigned()
> to work with bridges that do not have all the resource windows
> programmed by the boot firmware (previously we expected all I/O, memory
> and prefetchable memory were all programmed).
> 

Whilst this sounds plausible my understanding of how those flags are used
is very minimal so I'll leave this one for others to review who hopefully
already know how that works!


>  drivers/pci/setup-bus.c | 56 ++++++++++++++++++++++++++++++++++++++++-
>  1 file changed, 55 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/pci/setup-bus.c b/drivers/pci/setup-bus.c
> index d456175ddc4f..143ec80cc0b2 100644
> --- a/drivers/pci/setup-bus.c
> +++ b/drivers/pci/setup-bus.c
> @@ -1768,7 +1768,10 @@ static void adjust_bridge_window(struct pci_dev *bridge, struct resource *res,
>  	}
>  
>  	res->end = res->start + new_size - 1;
> -	remove_from_list(add_list, res);
> +
> +	/* If the resource is part of the add_list remove it now */
> +	if (add_list)
> +		remove_from_list(add_list, res);
>  }
>  
>  static void pci_bus_distribute_available_resources(struct pci_bus *bus,
> @@ -1981,6 +1984,8 @@ static void pci_bridge_distribute_available_resources(struct pci_dev *bridge,
>  	if (!bridge->is_hotplug_bridge)
>  		return;
>  
> +	pci_dbg(bridge, "distributing available resources\n");
> +
>  	/* Take the initial extra resources from the hotplug port */
>  	available_io = bridge->resource[PCI_BRIDGE_IO_WINDOW];
>  	available_mmio = bridge->resource[PCI_BRIDGE_MEM_WINDOW];
> @@ -1992,6 +1997,53 @@ static void pci_bridge_distribute_available_resources(struct pci_dev *bridge,
>  					       available_mmio_pref);
>  }
>  
> +static bool pci_bridge_resources_not_assigned(struct pci_dev *dev)
> +{
> +	const struct resource *r;
> +
> +	/*
> +	 * Check the child device's resources and if they are not yet
> +	 * assigned it means we are configuring them (not the boot
> +	 * firmware) so we should be able to extend the upstream
> +	 * bridge's (that's the hotplug downstream PCIe port) resources
> +	 * in the same way we do with the normal hotplug case.
> +	 */
> +	r = &dev->resource[PCI_BRIDGE_IO_WINDOW];
> +	if (r->flags && !(r->flags & IORESOURCE_STARTALIGN))
> +		return false;
> +	r = &dev->resource[PCI_BRIDGE_MEM_WINDOW];
> +	if (r->flags && !(r->flags & IORESOURCE_STARTALIGN))
> +		return false;
> +	r = &dev->resource[PCI_BRIDGE_PREF_MEM_WINDOW];
> +	if (r->flags && !(r->flags & IORESOURCE_STARTALIGN))
> +		return false;
> +
> +	return true;
> +}