From: Ira Weiny <ira.weiny@intel.com>
To: Dan Williams <dan.j.williams@intel.com>
Cc: Bjorn Helgaas <bhelgaas@google.com>,
Alison Schofield <alison.schofield@intel.com>,
Vishal Verma <vishal.l.verma@intel.com>,
Ira Weiny <ira.weiny@intel.com>,
Davidlohr Bueso <dave@stgolabs.net>,
Jonathan Cameron <Jonathan.Cameron@huawei.com>,
Dave Jiang <dave.jiang@intel.com>,
Ben Widawsky <bwidawsk@kernel.org>,
Steven Rostedt <rostedt@goodmis.org>,
linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org,
linux-acpi@vger.kernel.org, linux-cxl@vger.kernel.org,
Bjorn Helgaas <helgaas@kernel.org>
Subject: [PATCH v7 0/8] cxl: Process event logs
Date: Tue, 17 Jan 2023 21:53:36 -0800 [thread overview]
Message-ID: <20221216-cxl-ev-log-v7-0-2316a5c8f7d8@intel.com> (raw)
CXL devices have multiple event logs which can be queried for CXL event
records.
Add event log processing and cxl-test infrastructure. In addition to cxl-test,
this code has been tested with the qemu patches posted here:
https://lore.kernel.org/all/20221221-ira-cxl-events-2022-11-17-v2-0-2ce2ecc06219@intel.com/
The series is now in 3 parts:
1) Base functionality including interrupts
2) Tracing specific events (Dynamic Capacity Event Record is defered)
3) cxl-test infrastructure for basic tests
To: Dan Williams <dan.j.williams@intel.com>
Cc: Bjorn Helgaas <bhelgaas@google.com>
Cc: Alison Schofield <alison.schofield@intel.com>
Cc: Vishal Verma <vishal.l.verma@intel.com>
Cc: Ira Weiny <ira.weiny@intel.com>
Cc: Davidlohr Bueso <dave@stgolabs.net>
Cc: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Cc: Dave Jiang <dave.jiang@intel.com>
Cc: Ben Widawsky <bwidawsk@kernel.org>
Cc: Steven Rostedt <rostedt@goodmis.org>
Cc: linux-kernel@vger.kernel.org
Cc: linux-pci@vger.kernel.org
Cc: linux-acpi@vger.kernel.org
Cc: linux-cxl@vger.kernel.org
Signed-off-by: Ira Weiny <ira.weiny@intel.com>
---
Changes in v7:
- Jonathan: Address minor comments on V6
- Link to v6: https://lore.kernel.org/r/20221216-cxl-ev-log-v6-0-346583105b30@intel.com
---
Davidlohr Bueso (1):
cxl/mem: Wire up event interrupts
Ira Weiny (7):
cxl/mem: Read, trace, and clear events on driver load
cxl/mem: Trace General Media Event Record
cxl/mem: Trace DRAM Event Record
cxl/mem: Trace Memory Module Event Record
cxl/test: Add generic mock events
cxl/test: Add specific events
cxl/test: Simulate event log overflow
drivers/cxl/core/mbox.c | 198 +++++++++++++++++
drivers/cxl/core/trace.h | 479 ++++++++++++++++++++++++++++++++++++++++++
drivers/cxl/cxl.h | 16 ++
drivers/cxl/cxlmem.h | 166 +++++++++++++++
drivers/cxl/cxlpci.h | 6 +
drivers/cxl/pci.c | 243 +++++++++++++++++++++
tools/testing/cxl/test/Kbuild | 2 +-
tools/testing/cxl/test/mem.c | 352 +++++++++++++++++++++++++++++++
8 files changed, 1461 insertions(+), 1 deletion(-)
---
base-commit: 589c3357370a596ef7c99c00baca8ac799fce531
change-id: 20221216-cxl-ev-log-f06383197541
Best regards,
--
Ira Weiny <ira.weiny@intel.com>
next reply other threads:[~2023-01-18 5:57 UTC|newest]
Thread overview: 30+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-01-18 5:53 Ira Weiny [this message]
2023-01-18 5:53 ` [PATCH v7 1/8] cxl/mem: Read, trace, and clear events on driver load Ira Weiny
2023-01-26 21:53 ` Dan Williams
2023-01-27 0:49 ` Dan Williams
2023-01-27 19:45 ` Ira Weiny
2023-05-05 9:47 ` Huai-Cheng
2023-05-08 2:41 ` Ira Weiny
2023-05-09 21:41 ` Dave Jiang
2023-01-18 5:53 ` [PATCH v7 2/8] cxl/mem: Wire up event interrupts ira.weiny
2023-01-26 22:00 ` Dan Williams
2023-05-09 21:42 ` Dave Jiang
[not found] ` <tencent_D9D9D358330CA573E23D490C6EE13E0DC105@qq.com>
2023-05-19 1:38 ` CXL memory device not created correctly Davidlohr Bueso
2023-05-19 15:10 ` Jonathan Cameron
2023-05-19 15:20 ` Ira Weiny
2023-05-19 15:37 ` Jonathan Cameron
2023-05-31 2:18 ` Luis Chamberlain
2023-06-01 3:12 ` Ira Weiny
2023-06-01 3:46 ` Davidlohr Bueso
2023-01-18 5:53 ` [PATCH v7 3/8] cxl/mem: Trace General Media Event Record Ira Weiny
2023-05-09 21:47 ` Dave Jiang
2023-01-18 5:53 ` [PATCH v7 4/8] cxl/mem: Trace DRAM " Ira Weiny
2023-05-09 21:48 ` Dave Jiang
2023-01-18 5:53 ` [PATCH v7 5/8] cxl/mem: Trace Memory Module " Ira Weiny
2023-05-09 21:52 ` Dave Jiang
2023-01-18 5:53 ` [PATCH v7 6/8] cxl/test: Add generic mock events Ira Weiny
2023-05-09 22:03 ` Dave Jiang
2023-01-18 5:53 ` [PATCH v7 7/8] cxl/test: Add specific events Ira Weiny
2023-05-09 22:08 ` Dave Jiang
2023-01-18 5:53 ` [PATCH v7 8/8] cxl/test: Simulate event log overflow Ira Weiny
2023-05-09 22:31 ` Dave Jiang
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