[PATCH] PCI: revert "Enable PASID only when ACS RR & UF enabled on upstream path"

["Christian König" <ckoenig.leichtzumerken@gmail.com>]

This reverts commit 201007ef707a8bb5592cd07dd46fc9222c48e0b9.

It's correct that the PCIe fabric routes Memory Requests based on the
TLP address, but enabling the PASID mapping doesn't necessary mean that
Memory Requests will have a PASID associated with them.

The alternative is ATS which lets the device resolve the PASID+addr pair
before a memory request is made into a routeable TLB address through the
TA. Those resolved addresses are then cached on the device instead of
in the IOMMU TLB.

So the assumption that you mandatory need ACS to enabled PASID handling
on a device is simply not correct, we need to take ATS into account as
well.

The patch caused failures with AMDs integrated GPUs because some of them
only enable ATS but not ACS.

For now just revert the patch until this is completely solved.

CC: Jason Gunthorpe <jgg@nvidia.com>
CC: Kevin Tian <kevin.tian@intel.com>
CC: Lu Baolu <baolu.lu@linux.intel.com>
CC: Bjorn Helgaas <bhelgaas@google.com>
CC: Tony Zhu <tony.zhu@intel.com>
CC: Joerg Roedel <jroedel@suse.de>
Signed-off-by: Christian König <christian.koenig@amd.com>
Bug: https://bugzilla.kernel.org/show_bug.cgi?id=216865
---
 drivers/pci/ats.c | 3 ---
 1 file changed, 3 deletions(-)

diff --git a/drivers/pci/ats.c b/drivers/pci/ats.c
index f9cc2e10b676..c967ad6e2626 100644
--- a/drivers/pci/ats.c
+++ b/drivers/pci/ats.c
@@ -382,9 +382,6 @@ int pci_enable_pasid(struct pci_dev *pdev, int features)
 	if (!pasid)
 		return -EINVAL;
 
-	if (!pci_acs_path_enabled(pdev, NULL, PCI_ACS_RR | PCI_ACS_UF))
-		return -EINVAL;
-
 	pci_read_config_word(pdev, pasid + PCI_PASID_CAP, &supported);
 	supported &= PCI_PASID_CAP_EXEC | PCI_PASID_CAP_PRIV;
 
-- 
2.25.1