From: Abel Vesa <abel.vesa@linaro.org>
To: "Andy Gross" <agross@kernel.org>,
"Bjorn Andersson" <andersson@kernel.org>,
"Konrad Dybcio" <konrad.dybcio@linaro.org>,
"Lorenzo Pieralisi" <lorenzo.pieralisi@arm.com>,
"Rob Herring" <robh@kernel.org>,
"Krzysztof Wilczyński" <kw@linux.com>,
"Bjorn Helgaas" <bhelgaas@google.com>,
"Krzysztof Kozlowski" <krzysztof.kozlowski+dt@linaro.org>,
"Lorenzo Pieralisi" <lpieralisi@kernel.org>,
"vkoul@kernel.org" <vkoul@kernel.org>,
"Kishon Vijay Abraham I" <kishon@kernel.org>,
"Manivannan Sadhasivam" <mani@kernel.org>
Cc: linux-arm-msm@vger.kernel.org, linux-pci@vger.kernel.org,
linux-phy@lists.infradead.org, devicetree@vger.kernel.org,
Linux Kernel Mailing List <linux-kernel@vger.kernel.org>
Subject: [PATCH v4 10/12] PCI: qcom: Add SM8550 PCIe support
Date: Thu, 19 Jan 2023 16:04:51 +0200 [thread overview]
Message-ID: <20230119140453.3942340-11-abel.vesa@linaro.org> (raw)
In-Reply-To: <20230119140453.3942340-1-abel.vesa@linaro.org>
Add compatible for both PCIe found on SM8550.
Also add the cnoc_pcie_sf_axi clock needed by the SM8550.
Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
---
The v3 of this patchset is:
https://lore.kernel.org/all/20230119112453.3393911-1-abel.vesa@linaro.org/
Changes since v3:
* renamed cnoc_pcie_sf_axi to cnoc_sf_axi
Changes since v2:
* none
Changes since v1:
* changed the subject line prefix for the patch to match the history,
like Bjorn Helgaas suggested.
* added Konrad's R-b tag
drivers/pci/controller/dwc/pcie-qcom.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/pci/controller/dwc/pcie-qcom.c b/drivers/pci/controller/dwc/pcie-qcom.c
index 77e5dc7b88ad..30f74bc51dbf 100644
--- a/drivers/pci/controller/dwc/pcie-qcom.c
+++ b/drivers/pci/controller/dwc/pcie-qcom.c
@@ -182,7 +182,7 @@ struct qcom_pcie_resources_2_3_3 {
/* 6 clocks typically, 7 for sm8250 */
struct qcom_pcie_resources_2_7_0 {
- struct clk_bulk_data clks[12];
+ struct clk_bulk_data clks[13];
int num_clks;
struct regulator_bulk_data supplies[2];
struct reset_control *pci_reset;
@@ -1208,6 +1208,7 @@ static int qcom_pcie_get_resources_2_7_0(struct qcom_pcie *pcie)
res->clks[idx++].id = "noc_aggr_4";
res->clks[idx++].id = "noc_aggr_south_sf";
res->clks[idx++].id = "cnoc_qx";
+ res->clks[idx++].id = "cnoc_sf_axi";
num_opt_clks = idx - num_clks;
res->num_clks = idx;
@@ -1828,6 +1829,7 @@ static const struct of_device_id qcom_pcie_match[] = {
{ .compatible = "qcom,pcie-sm8250", .data = &cfg_1_9_0 },
{ .compatible = "qcom,pcie-sm8450-pcie0", .data = &cfg_1_9_0 },
{ .compatible = "qcom,pcie-sm8450-pcie1", .data = &cfg_1_9_0 },
+ { .compatible = "qcom,pcie-sm8550", .data = &cfg_1_9_0 },
{ }
};
--
2.34.1
next prev parent reply other threads:[~2023-01-19 14:06 UTC|newest]
Thread overview: 28+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-01-19 14:04 [PATCH v4 00/12] sm8550: Add PCIe HC and PHY support Abel Vesa
2023-01-19 14:04 ` [PATCH v4 01/12] dt-bindings: phy: Add QMP PCIe PHY comptible for SM8550 Abel Vesa
2023-01-22 14:09 ` Krzysztof Kozlowski
2023-01-19 14:04 ` [PATCH v4 02/12] phy: qcom-qmp: pcs: Add v6 register offsets Abel Vesa
2023-01-19 14:04 ` [PATCH v4 03/12] phy: qcom-qmp: pcs: Add v6.20 " Abel Vesa
2023-01-19 14:04 ` [PATCH v4 04/12] phy: qcom-qmp: pcs-pcie: Add v6 " Abel Vesa
2023-01-19 14:04 ` [PATCH v4 05/12] phy: qcom-qmp: pcs-pcie: Add v6.20 " Abel Vesa
2023-01-19 14:04 ` [PATCH v4 06/12] phy: qcom-qmp: qserdes-txrx: " Abel Vesa
2023-01-19 14:04 ` [PATCH v4 07/12] phy: qcom-qmp: qserdes-lane-shared: Add v6 " Abel Vesa
2023-01-19 14:04 ` [PATCH v4 08/12] phy: qcom-qmp-pcie: Add support for SM8550 g3x2 and g4x2 PCIEs Abel Vesa
2023-01-23 15:03 ` Johan Hovold
2023-01-23 19:42 ` Abel Vesa
2023-01-19 14:04 ` [PATCH v4 09/12] dt-bindings: PCI: qcom: Add SM8550 compatible Abel Vesa
2023-01-22 14:10 ` Krzysztof Kozlowski
2023-01-23 10:44 ` Abel Vesa
2023-01-23 11:03 ` Krzysztof Kozlowski
2023-01-19 14:04 ` Abel Vesa [this message]
2023-01-19 14:21 ` [PATCH v4 10/12] PCI: qcom: Add SM8550 PCIe support Manivannan Sadhasivam
2023-01-19 15:35 ` Abel Vesa
2023-01-23 8:27 ` Johan Hovold
2023-01-19 14:04 ` [PATCH v4 11/12] arm64: dts: qcom: sm8550: Add PCIe PHYs and controllers nodes Abel Vesa
2023-01-23 8:51 ` Johan Hovold
2023-01-23 12:39 ` Abel Vesa
2023-01-23 13:11 ` Abel Vesa
2023-01-23 14:17 ` Johan Hovold
2023-01-23 14:16 ` Johan Hovold
2023-01-23 14:24 ` Johan Hovold
2023-01-19 14:04 ` [PATCH v4 12/12] arm64: dts: qcom: sm8550-mtp: " Abel Vesa
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20230119140453.3942340-11-abel.vesa@linaro.org \
--to=abel.vesa@linaro.org \
--cc=agross@kernel.org \
--cc=andersson@kernel.org \
--cc=bhelgaas@google.com \
--cc=devicetree@vger.kernel.org \
--cc=kishon@kernel.org \
--cc=konrad.dybcio@linaro.org \
--cc=krzysztof.kozlowski+dt@linaro.org \
--cc=kw@linux.com \
--cc=linux-arm-msm@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-pci@vger.kernel.org \
--cc=linux-phy@lists.infradead.org \
--cc=lorenzo.pieralisi@arm.com \
--cc=lpieralisi@kernel.org \
--cc=mani@kernel.org \
--cc=robh@kernel.org \
--cc=vkoul@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).