From: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
To: andersson@kernel.org, lpieralisi@kernel.org, robh@kernel.org,
kw@linux.com, krzysztof.kozlowski+dt@linaro.org,
vkoul@kernel.org
Cc: konrad.dybcio@linaro.org, bhelgaas@google.com, kishon@kernel.org,
linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org,
linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org,
devicetree@vger.kernel.org,
Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Subject: [PATCH v3 06/13] ARM: dts: qcom: sdx55: Rename pcie0_{phy/lane} to pcie_{phy/lane}
Date: Wed, 8 Mar 2023 13:54:17 +0530 [thread overview]
Message-ID: <20230308082424.140224-7-manivannan.sadhasivam@linaro.org> (raw)
In-Reply-To: <20230308082424.140224-1-manivannan.sadhasivam@linaro.org>
There is only one PCIe PHY in this SoC, so there is no need to add an
index to the suffix. This also matches the naming convention of the PCIe
controller.
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
---
arch/arm/boot/dts/qcom-sdx55-telit-fn980-tlb.dts | 2 +-
arch/arm/boot/dts/qcom-sdx55.dtsi | 6 +++---
2 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/arm/boot/dts/qcom-sdx55-telit-fn980-tlb.dts b/arch/arm/boot/dts/qcom-sdx55-telit-fn980-tlb.dts
index ad74ecc2a196..81f33eba39e5 100644
--- a/arch/arm/boot/dts/qcom-sdx55-telit-fn980-tlb.dts
+++ b/arch/arm/boot/dts/qcom-sdx55-telit-fn980-tlb.dts
@@ -242,7 +242,7 @@ &ipa {
status = "okay";
};
-&pcie0_phy {
+&pcie_phy {
status = "okay";
vdda-phy-supply = <&vreg_l1e_bb_1p2>;
diff --git a/arch/arm/boot/dts/qcom-sdx55.dtsi b/arch/arm/boot/dts/qcom-sdx55.dtsi
index 7fa542249f1a..bd4edceaa1f4 100644
--- a/arch/arm/boot/dts/qcom-sdx55.dtsi
+++ b/arch/arm/boot/dts/qcom-sdx55.dtsi
@@ -335,7 +335,7 @@ pcie_ep: pcie-ep@1c00000 {
resets = <&gcc GCC_PCIE_BCR>;
reset-names = "core";
power-domains = <&gcc PCIE_GDSC>;
- phys = <&pcie0_lane>;
+ phys = <&pcie_lane>;
phy-names = "pciephy";
max-link-speed = <3>;
num-lanes = <2>;
@@ -343,7 +343,7 @@ pcie_ep: pcie-ep@1c00000 {
status = "disabled";
};
- pcie0_phy: phy@1c07000 {
+ pcie_phy: phy@1c07000 {
compatible = "qcom,sdx55-qmp-pcie-phy";
reg = <0x01c07000 0x1c4>;
#address-cells = <1>;
@@ -363,7 +363,7 @@ pcie0_phy: phy@1c07000 {
status = "disabled";
- pcie0_lane: lanes@1c06000 {
+ pcie_lane: lanes@1c06000 {
reg = <0x01c06000 0x104>, /* tx0 */
<0x01c06200 0x328>, /* rx0 */
<0x01c07200 0x1e8>, /* pcs */
--
2.25.1
next prev parent reply other threads:[~2023-03-08 8:25 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-03-08 8:24 [PATCH v3 00/13] Add PCIe RC support to Qcom SDX55 SoC Manivannan Sadhasivam
2023-03-08 8:24 ` [PATCH v3 01/13] dt-bindings: PCI: qcom: Update maintainers entry Manivannan Sadhasivam
2023-03-08 8:24 ` [PATCH v3 02/13] dt-bindings: PCI: qcom: Add iommu-map properties Manivannan Sadhasivam
2023-03-16 22:51 ` Rob Herring
2023-03-08 8:24 ` [PATCH v3 03/13] dt-bindings: PCI: qcom: Add SDX55 SoC Manivannan Sadhasivam
2023-03-08 8:24 ` [PATCH v3 04/13] dt-bindings: PCI: qcom-ep: Fix the unit address used in example Manivannan Sadhasivam
2023-03-08 8:24 ` [PATCH v3 05/13] ARM: dts: qcom: sdx55: Fix the unit address of PCIe EP node Manivannan Sadhasivam
2023-03-08 8:24 ` Manivannan Sadhasivam [this message]
2023-03-08 8:24 ` [PATCH v3 07/13] ARM: dts: qcom: sdx55: Add support for PCIe RC controller Manivannan Sadhasivam
2023-03-08 8:24 ` [PATCH v3 08/13] ARM: dts: qcom: sdx55: List the property values vertically Manivannan Sadhasivam
2023-03-08 8:24 ` [PATCH v3 09/13] ARM: dts: qcom: sdx55-t55: Enable PCIe RC support Manivannan Sadhasivam
2023-03-08 8:24 ` [PATCH v3 10/13] ARM: dts: qcom: sdx55-t55: Move "status" property down Manivannan Sadhasivam
2023-03-08 8:24 ` [PATCH v3 11/13] phy: qcom-qmp-pcie: Split out EP related init sequence for SDX55 Manivannan Sadhasivam
2023-03-20 9:27 ` Vinod Koul
2023-03-08 8:24 ` [PATCH v3 12/13] phy: qcom-qmp-pcie: Add RC " Manivannan Sadhasivam
2023-03-20 9:27 ` Vinod Koul
2023-03-08 8:24 ` [PATCH v3 13/13] PCI: qcom: Add support for SDX55 SoC Manivannan Sadhasivam
2023-03-16 3:20 ` (subset) [PATCH v3 00/13] Add PCIe RC support to Qcom " Bjorn Andersson
2023-04-11 10:09 ` Lorenzo Pieralisi
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