From: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
To: andersson@kernel.org, lpieralisi@kernel.org, robh@kernel.org,
kw@linux.com, krzysztof.kozlowski+dt@linaro.org,
vkoul@kernel.org
Cc: konrad.dybcio@linaro.org, bhelgaas@google.com, kishon@kernel.org,
linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org,
linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org,
devicetree@vger.kernel.org,
Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Subject: [PATCH v3 08/13] ARM: dts: qcom: sdx55: List the property values vertically
Date: Wed, 8 Mar 2023 13:54:19 +0530 [thread overview]
Message-ID: <20230308082424.140224-9-manivannan.sadhasivam@linaro.org> (raw)
In-Reply-To: <20230308082424.140224-1-manivannan.sadhasivam@linaro.org>
To align with the rest of the devicetree files and the relative properties,
let's list the values of properties such as {reg/clock/interrupt}-names
vertically.
Suggested-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
---
arch/arm/boot/dts/qcom-sdx55.dtsi | 23 ++++++++++++++++++-----
1 file changed, 18 insertions(+), 5 deletions(-)
diff --git a/arch/arm/boot/dts/qcom-sdx55.dtsi b/arch/arm/boot/dts/qcom-sdx55.dtsi
index 9dabb94eafbc..286fa92da428 100644
--- a/arch/arm/boot/dts/qcom-sdx55.dtsi
+++ b/arch/arm/boot/dts/qcom-sdx55.dtsi
@@ -393,7 +393,11 @@ pcie_ep: pcie-ep@1c00000 {
<0x40001000 0x1000>,
<0x40200000 0x100000>,
<0x01c03000 0x3000>;
- reg-names = "parf", "dbi", "elbi", "atu", "addr_space",
+ reg-names = "parf",
+ "dbi",
+ "elbi",
+ "atu",
+ "addr_space",
"mmio";
qcom,perst-regs = <&tcsr 0xb258 0xb270>;
@@ -405,12 +409,18 @@ pcie_ep: pcie-ep@1c00000 {
<&gcc GCC_PCIE_SLV_Q2A_AXI_CLK>,
<&gcc GCC_PCIE_SLEEP_CLK>,
<&gcc GCC_PCIE_0_CLKREF_CLK>;
- clock-names = "aux", "cfg", "bus_master", "bus_slave",
- "slave_q2a", "sleep", "ref";
+ clock-names = "aux",
+ "cfg",
+ "bus_master",
+ "bus_slave",
+ "slave_q2a",
+ "sleep",
+ "ref";
interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "global", "doorbell";
+ interrupt-names = "global",
+ "doorbell";
reset-gpios = <&tlmm 57 GPIO_ACTIVE_LOW>;
wake-gpios = <&tlmm 53 GPIO_ACTIVE_LOW>;
resets = <&gcc GCC_PCIE_BCR>;
@@ -434,7 +444,10 @@ pcie_phy: phy@1c07000 {
<&gcc GCC_PCIE_CFG_AHB_CLK>,
<&gcc GCC_PCIE_0_CLKREF_CLK>,
<&gcc GCC_PCIE_RCHNG_PHY_CLK>;
- clock-names = "aux", "cfg_ahb", "ref", "refgen";
+ clock-names = "aux",
+ "cfg_ahb",
+ "ref",
+ "refgen";
resets = <&gcc GCC_PCIE_PHY_BCR>;
reset-names = "phy";
--
2.25.1
next prev parent reply other threads:[~2023-03-08 8:26 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-03-08 8:24 [PATCH v3 00/13] Add PCIe RC support to Qcom SDX55 SoC Manivannan Sadhasivam
2023-03-08 8:24 ` [PATCH v3 01/13] dt-bindings: PCI: qcom: Update maintainers entry Manivannan Sadhasivam
2023-03-08 8:24 ` [PATCH v3 02/13] dt-bindings: PCI: qcom: Add iommu-map properties Manivannan Sadhasivam
2023-03-16 22:51 ` Rob Herring
2023-03-08 8:24 ` [PATCH v3 03/13] dt-bindings: PCI: qcom: Add SDX55 SoC Manivannan Sadhasivam
2023-03-08 8:24 ` [PATCH v3 04/13] dt-bindings: PCI: qcom-ep: Fix the unit address used in example Manivannan Sadhasivam
2023-03-08 8:24 ` [PATCH v3 05/13] ARM: dts: qcom: sdx55: Fix the unit address of PCIe EP node Manivannan Sadhasivam
2023-03-08 8:24 ` [PATCH v3 06/13] ARM: dts: qcom: sdx55: Rename pcie0_{phy/lane} to pcie_{phy/lane} Manivannan Sadhasivam
2023-03-08 8:24 ` [PATCH v3 07/13] ARM: dts: qcom: sdx55: Add support for PCIe RC controller Manivannan Sadhasivam
2023-03-08 8:24 ` Manivannan Sadhasivam [this message]
2023-03-08 8:24 ` [PATCH v3 09/13] ARM: dts: qcom: sdx55-t55: Enable PCIe RC support Manivannan Sadhasivam
2023-03-08 8:24 ` [PATCH v3 10/13] ARM: dts: qcom: sdx55-t55: Move "status" property down Manivannan Sadhasivam
2023-03-08 8:24 ` [PATCH v3 11/13] phy: qcom-qmp-pcie: Split out EP related init sequence for SDX55 Manivannan Sadhasivam
2023-03-20 9:27 ` Vinod Koul
2023-03-08 8:24 ` [PATCH v3 12/13] phy: qcom-qmp-pcie: Add RC " Manivannan Sadhasivam
2023-03-20 9:27 ` Vinod Koul
2023-03-08 8:24 ` [PATCH v3 13/13] PCI: qcom: Add support for SDX55 SoC Manivannan Sadhasivam
2023-03-16 3:20 ` (subset) [PATCH v3 00/13] Add PCIe RC support to Qcom " Bjorn Andersson
2023-04-11 10:09 ` Lorenzo Pieralisi
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