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From: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
To: andersson@kernel.org, lpieralisi@kernel.org, kw@linux.com,
	krzysztof.kozlowski+dt@linaro.org, robh@kernel.org
Cc: konrad.dybcio@linaro.org, linux-arm-msm@vger.kernel.org,
	devicetree@vger.kernel.org, linux-pci@vger.kernel.org,
	linux-kernel@vger.kernel.org, quic_srichara@quicinc.com,
	Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Subject: [PATCH v2 15/17] arm64: dts: qcom: sm8250: Add "mhi" region to the PCIe nodes
Date: Thu,  9 Mar 2023 14:21:00 +0530	[thread overview]
Message-ID: <20230309085102.120977-16-manivannan.sadhasivam@linaro.org> (raw)
In-Reply-To: <20230309085102.120977-1-manivannan.sadhasivam@linaro.org>

The "mhi" region contains the debug registers that could be used to monitor
the PCIe link transitions.

Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
---
 arch/arm64/boot/dts/qcom/sm8250.dtsi | 15 +++++++++------
 1 file changed, 9 insertions(+), 6 deletions(-)

diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi
index 2f0e460acccd..81383e20d3d9 100644
--- a/arch/arm64/boot/dts/qcom/sm8250.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi
@@ -1824,8 +1824,9 @@ pcie0: pci@1c00000 {
 			      <0 0x60000000 0 0xf1d>,
 			      <0 0x60000f20 0 0xa8>,
 			      <0 0x60001000 0 0x1000>,
-			      <0 0x60100000 0 0x100000>;
-			reg-names = "parf", "dbi", "elbi", "atu", "config";
+			      <0 0x60100000 0 0x100000>,
+			      <0 0x01c03000 0 0x1000>;
+			reg-names = "parf", "dbi", "elbi", "atu", "config", "mhi";
 			device_type = "pci";
 			linux,pci-domain = <0>;
 			bus-range = <0x00 0xff>;
@@ -1933,8 +1934,9 @@ pcie1: pci@1c08000 {
 			      <0 0x40000000 0 0xf1d>,
 			      <0 0x40000f20 0 0xa8>,
 			      <0 0x40001000 0 0x1000>,
-			      <0 0x40100000 0 0x100000>;
-			reg-names = "parf", "dbi", "elbi", "atu", "config";
+			      <0 0x40100000 0 0x100000>,
+			      <0 0x01c0b000 0 0x1000>;
+			reg-names = "parf", "dbi", "elbi", "atu", "config", "mhi";
 			device_type = "pci";
 			linux,pci-domain = <1>;
 			bus-range = <0x00 0xff>;
@@ -2041,8 +2043,9 @@ pcie2: pci@1c10000 {
 			      <0 0x64000000 0 0xf1d>,
 			      <0 0x64000f20 0 0xa8>,
 			      <0 0x64001000 0 0x1000>,
-			      <0 0x64100000 0 0x100000>;
-			reg-names = "parf", "dbi", "elbi", "atu", "config";
+			      <0 0x64100000 0 0x100000>,
+			      <0 0x01c13000 0 0x1000>;
+			reg-names = "parf", "dbi", "elbi", "atu", "config", "mhi";
 			device_type = "pci";
 			linux,pci-domain = <2>;
 			bus-range = <0x00 0xff>;
-- 
2.25.1


  parent reply	other threads:[~2023-03-09  8:53 UTC|newest]

Thread overview: 20+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-03-09  8:50 [PATCH v2 00/17] Qcom PCIe cleanups and improvements Manivannan Sadhasivam
2023-03-09  8:50 ` [PATCH v2 01/17] PCI: qcom: Remove PCIE20_ prefix from register definitions Manivannan Sadhasivam
2023-03-09  8:50 ` [PATCH v2 02/17] PCI: qcom: Sort and group registers and bitfield definitions Manivannan Sadhasivam
2023-03-09  8:50 ` [PATCH v2 03/17] PCI: qcom: Use bitfield definitions for register fields Manivannan Sadhasivam
2023-03-09  8:50 ` [PATCH v2 04/17] PCI: qcom: Add missing macros " Manivannan Sadhasivam
2023-03-09  8:50 ` [PATCH v2 05/17] PCI: qcom: Use lower case for hex Manivannan Sadhasivam
2023-03-09  8:50 ` [PATCH v2 06/17] PCI: qcom: Use bulk reset APIs for handling resets for IP rev 2.1.0 Manivannan Sadhasivam
2023-03-09  8:50 ` [PATCH v2 07/17] PCI: qcom: Use bulk clock APIs for handling clocks for IP rev 1.0.0 Manivannan Sadhasivam
2023-03-09  8:50 ` [PATCH v2 08/17] PCI: qcom: Use bulk clock APIs for handling clocks for IP rev 2.3.2 Manivannan Sadhasivam
2023-03-09  8:50 ` [PATCH v2 09/17] PCI: qcom: Use bulk clock APIs for handling clocks for IP rev 2.3.3 Manivannan Sadhasivam
2023-03-09  8:50 ` [PATCH v2 10/17] PCI: qcom: Use bulk reset APIs for handling resets " Manivannan Sadhasivam
2023-03-09  8:50 ` [PATCH v2 11/17] PCI: qcom: Use bulk reset APIs for handling resets for IP rev 2.4.0 Manivannan Sadhasivam
2023-03-09  8:50 ` [PATCH v2 12/17] PCI: qcom: Use macros for defining total no. of clocks & supplies Manivannan Sadhasivam
2023-03-09  8:50 ` [PATCH v2 13/17] dt-bindings: PCI: qcom: Add "mhi" register region to supported SoCs Manivannan Sadhasivam
2023-03-09  8:50 ` [PATCH v2 14/17] arm64: dts: qcom: sdm845: Add "mhi" region to the PCIe nodes Manivannan Sadhasivam
2023-03-09  8:51 ` Manivannan Sadhasivam [this message]
2023-03-09  8:51 ` [PATCH v2 16/17] arm64: dts: qcom: sc8280xp: " Manivannan Sadhasivam
2023-03-09  8:51 ` [PATCH v2 17/17] PCI: qcom: Expose link transition counts via debugfs Manivannan Sadhasivam
2023-03-09 11:51   ` Sricharan Ramabadhran
2023-03-09 14:53     ` Manivannan Sadhasivam

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