From: Rick Wertenbroek <rick.wertenbroek@gmail.com>
To: alberto.dassatti@heig-vd.ch
Cc: damien.lemoal@opensource.wdc.com, xxm@rock-chips.com,
"Rick Wertenbroek" <rick.wertenbroek@gmail.com>,
stable@vger.kernel.org, "Shawn Lin" <shawn.lin@rock-chips.com>,
"Bjorn Helgaas" <bhelgaas@google.com>,
"Lorenzo Pieralisi" <lpieralisi@kernel.org>,
"Krzysztof Wilczyński" <kw@linux.com>,
"Rob Herring" <robh@kernel.org>,
"Krzysztof Kozlowski" <krzysztof.kozlowski+dt@linaro.org>,
"Heiko Stuebner" <heiko@sntech.de>,
"Johan Jonker" <jbx6244@gmail.com>,
"Brian Norris" <briannorris@chromium.org>,
"Caleb Connolly" <kc@postmarketos.org>,
"Corentin Labbe" <clabbe@baylibre.com>,
"Judy Hsiao" <judyhsiao@chromium.org>,
"Sascha Hauer" <s.hauer@pengutronix.de>,
"Lin Huang" <hl@rock-chips.com>,
"Arnaud Ferraris" <arnaud.ferraris@collabora.com>,
"Hugh Cole-Baker" <sigmaris@gmail.com>,
linux-pci@vger.kernel.org, linux-rockchip@lists.infradead.org,
devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org
Subject: [PATCH v3 02/11] PCI: rockchip: Write PCI Device ID to correct register
Date: Tue, 4 Apr 2023 10:24:15 +0200 [thread overview]
Message-ID: <20230404082426.3880812-3-rick.wertenbroek@gmail.com> (raw)
In-Reply-To: <20230404082426.3880812-1-rick.wertenbroek@gmail.com>
Write PCI Device ID (DID) to the correct register. The Device ID was not
updated through the correct register. Device ID was written to a read-only
register and therefore did not work. The Device ID is now set through the
correct register. This is documented in the RK3399 TRM section 17.6.6.1.1
Fixes: cf590b078391 ("PCI: rockchip: Add EP driver for Rockchip PCIe controller")
Cc: stable@vger.kernel.org
Signed-off-by: Rick Wertenbroek <rick.wertenbroek@gmail.com>
Reviewed-by: Damien Le Moal <damien.lemoal@opensource.wdc.com>
Tested-by: Damien Le Moal <damien.lemoal@opensource.wdc.com>
---
drivers/pci/controller/pcie-rockchip-ep.c | 6 ++++--
drivers/pci/controller/pcie-rockchip.h | 2 ++
2 files changed, 6 insertions(+), 2 deletions(-)
diff --git a/drivers/pci/controller/pcie-rockchip-ep.c b/drivers/pci/controller/pcie-rockchip-ep.c
index d5c477020417..9b835377bd9e 100644
--- a/drivers/pci/controller/pcie-rockchip-ep.c
+++ b/drivers/pci/controller/pcie-rockchip-ep.c
@@ -115,6 +115,7 @@ static void rockchip_pcie_prog_ep_ob_atu(struct rockchip_pcie *rockchip, u8 fn,
static int rockchip_pcie_ep_write_header(struct pci_epc *epc, u8 fn, u8 vfn,
struct pci_epf_header *hdr)
{
+ u32 reg;
struct rockchip_pcie_ep *ep = epc_get_drvdata(epc);
struct rockchip_pcie *rockchip = &ep->rockchip;
@@ -127,8 +128,9 @@ static int rockchip_pcie_ep_write_header(struct pci_epc *epc, u8 fn, u8 vfn,
PCIE_CORE_CONFIG_VENDOR);
}
- rockchip_pcie_write(rockchip, hdr->deviceid << 16,
- ROCKCHIP_PCIE_EP_FUNC_BASE(fn) + PCI_VENDOR_ID);
+ reg = rockchip_pcie_read(rockchip, PCIE_EP_CONFIG_DID_VID);
+ reg = (reg & 0xFFFF) | (hdr->deviceid << 16);
+ rockchip_pcie_write(rockchip, reg, PCIE_EP_CONFIG_DID_VID);
rockchip_pcie_write(rockchip,
hdr->revid |
diff --git a/drivers/pci/controller/pcie-rockchip.h b/drivers/pci/controller/pcie-rockchip.h
index 32c3a859c26b..51a123e5c0cf 100644
--- a/drivers/pci/controller/pcie-rockchip.h
+++ b/drivers/pci/controller/pcie-rockchip.h
@@ -133,6 +133,8 @@
#define PCIE_RC_RP_ATS_BASE 0x400000
#define PCIE_RC_CONFIG_NORMAL_BASE 0x800000
#define PCIE_RC_CONFIG_BASE 0xa00000
+#define PCIE_EP_CONFIG_BASE 0xa00000
+#define PCIE_EP_CONFIG_DID_VID (PCIE_EP_CONFIG_BASE + 0x00)
#define PCIE_RC_CONFIG_RID_CCR (PCIE_RC_CONFIG_BASE + 0x08)
#define PCIE_RC_CONFIG_DCR (PCIE_RC_CONFIG_BASE + 0xc4)
#define PCIE_RC_CONFIG_DCR_CSPL_SHIFT 18
--
2.25.1
next prev parent reply other threads:[~2023-04-04 8:25 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-04-04 8:24 [PATCH v3 00/11] PCI: rockchip: Fix RK3399 PCIe endpoint controller driver Rick Wertenbroek
2023-04-04 8:24 ` [PATCH v3 01/11] PCI: rockchip: Remove writes to unused registers Rick Wertenbroek
2023-04-04 8:24 ` Rick Wertenbroek [this message]
2023-04-04 8:24 ` [PATCH v3 03/11] PCI: rockchip: Assert PCI Configuration Enable bit after probe Rick Wertenbroek
2023-04-04 8:24 ` [PATCH v3 04/11] PCI: rockchip: Add poll and timeout to wait for PHY PLLs to be locked Rick Wertenbroek
2023-04-04 8:24 ` [PATCH v3 05/11] arm64: dts: rockchip: Add dtsi entry for RK3399 PCIe endpoint core Rick Wertenbroek
2023-04-04 8:24 ` [PATCH v3 06/11] dt-bindings: PCI: Update the RK3399 example to a valid one Rick Wertenbroek
2023-04-04 8:45 ` Krzysztof Kozlowski
2023-04-04 8:58 ` Rick Wertenbroek
2023-04-04 13:29 ` Krzysztof Kozlowski
2023-04-04 14:42 ` Rick Wertenbroek
2023-04-04 8:24 ` [PATCH v3 07/11] PCI: rockchip: Fix legacy IRQ generation for RK3399 PCIe endpoint core Rick Wertenbroek
2023-04-04 8:24 ` [PATCH v3 08/11] PCI: rockchip: Fix window mapping and address translation for endpoint Rick Wertenbroek
2023-04-05 11:43 ` Damien Le Moal
2023-04-04 8:24 ` [PATCH v3 09/11] PCI: rockchip: Use u32 variable to access 32-bit registers Rick Wertenbroek
2023-04-04 8:24 ` [PATCH v3 10/11] PCI: rockchip: Don't advertise MSI-X in PCIe capabilities Rick Wertenbroek
2023-04-05 11:50 ` Damien Le Moal
2023-04-04 8:24 ` [PATCH v3 11/11] PCI: rockchip: Set address alignment for endpoint mode Rick Wertenbroek
2023-04-05 9:23 ` [PATCH v3 00/11] PCI: rockchip: Fix RK3399 PCIe endpoint controller driver Damien Le Moal
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