From: Ben Dooks <ben.dooks@codethink.co.uk>
To: linux-pci@vger.kernel.org, bhelgaas@google.com
Cc: Sudip Mukherjee <sudip.mukherjee@codethink.co.uk>,
Jude Onyenegecha <jude.onyenegecha@codethink.co.uk>,
Greentime Hu <greentime.hu@sifive.com>,
Jeegar Lakhani <jeegar.lakhani@sifive.com>,
Ben Dooks <ben.dooks@sifive.com>,
Ben Dooks <ben.dooks@codethink.co.uk>
Subject: [PATCH] pci: add PCI_EXT_CAP_ID_PL_32GT define
Date: Wed, 31 May 2023 10:55:45 +0100 [thread overview]
Message-ID: <20230531095545.293063-1-ben.dooks@codethink.co.uk> (raw)
From: Ben Dooks <ben.dooks@sifive.com>
Add the define for PCI_EXT_CAP_ID_PL_32GT for drivers that
will want this whilst doing Gen5/Gen6 accesses.
Signed-off-by: Ben Dooks <ben.dooks@sifive.com>
Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk>
---
include/uapi/linux/pci_regs.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/include/uapi/linux/pci_regs.h b/include/uapi/linux/pci_regs.h
index dc2000e0fe3a..e5f558d96493 100644
--- a/include/uapi/linux/pci_regs.h
+++ b/include/uapi/linux/pci_regs.h
@@ -738,6 +738,7 @@
#define PCI_EXT_CAP_ID_DVSEC 0x23 /* Designated Vendor-Specific */
#define PCI_EXT_CAP_ID_DLF 0x25 /* Data Link Feature */
#define PCI_EXT_CAP_ID_PL_16GT 0x26 /* Physical Layer 16.0 GT/s */
+#define PCI_EXT_CAP_ID_PL_32GT 0x2A /* Physical Layer 32.0 GT/s */
#define PCI_EXT_CAP_ID_DOE 0x2E /* Data Object Exchange */
#define PCI_EXT_CAP_ID_MAX PCI_EXT_CAP_ID_DOE
--
2.39.2
next reply other threads:[~2023-05-31 9:57 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-05-31 9:55 Ben Dooks [this message]
2023-05-31 9:57 ` [PATCH] pci: add PCI_EXT_CAP_ID_PL_32GT define Ben Dooks
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