Re: [PATCH v3] PCI: Add D3 support for PCI bridges in DT based platforms

From: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
To: Bjorn Helgaas <helgaas@kernel.org>
Cc: "Bjorn Helgaas" <bhelgaas@google.com>,
	"Bjorn Andersson" <andersson@kernel.org>,
	"Konrad Dybcio" <konrad.dybcio@linaro.org>,
	"Lorenzo Pieralisi" <lpieralisi@kernel.org>,
	"Krzysztof Wilczyński" <kw@linux.com>,
	"Rob Herring" <robh@kernel.org>, "Lukas Wunner" <lukas@wunner.de>,
	"Mika Westerberg" <mika.westerberg@linux.intel.com>,
	quic_krichai@quicinc.com, linux-pci@vger.kernel.org,
	linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org
Subject: Re: [PATCH v3] PCI: Add D3 support for PCI bridges in DT based platforms
Date: Wed, 28 Feb 2024 00:10:15 +0530	[thread overview]
Message-ID: <20240227184015.GS2587@thinkpad> (raw)
In-Reply-To: <20240227173705.GA241732@bhelgaas>

On Tue, Feb 27, 2024 at 11:37:05AM -0600, Bjorn Helgaas wrote:
> On Tue, Feb 27, 2024 at 10:38:40PM +0530, Manivannan Sadhasivam wrote:
> > On Tue, Feb 27, 2024 at 10:25:35AM -0600, Bjorn Helgaas wrote:
> > 
> > [...]
> > 
> > > > Ok, I got the issue. TBH, I added the device tree property based on
> > > > the existing quirks for the ACPI devices. But none of the DT based
> > > > platforms I'm aware of (even the legacy Qcom MSM8996 chipset
> > > > released in early 2016) doesn't have any issue with D3hot. But I'm
> > > > just nervous to assume it is the case for all the DT based platforms
> > > > in the wild.
> > > > 
> > > > But to proceed further, what is your preference? Should we ammend
> > > > the DT property to make it explicit that the propery only focuses on
> > > > the D3hot capability of the bridge and it works as per the spec
> > > > (PMCSR) or bite the bullet and enable D3hot for all the non-ACPI
> > > > platforms?
> > > > 
> > > > We can add quirks for the bridges later on if we happen to receive
> > > > any bug report.
> > > 
> > > I would assume all devices support D3hot via PMCSR per spec.  We can
> > > add quirks if we discover something that doesn't.
> > 
> > When you say "all devices", are you referring to bridges in DT
> > platforms or the bridges across all platforms?
> 
> This patch is only concerned with DT, so that's what I'm commenting on
> here.  I don't know how to untangle the question of ACPI systems.
> 

Ok, I just wanted to confirm.

> This patch affects platform_pci_bridge_d3(), so just based on the
> "platform" in the function name, I would expect it to be concerned
> with the D3cold case and whether the platform supports controlling
> main power.
> 
> It looks like this patch says "we can put devices in D3cold if DT has
> 'supports-d3'".  But I don't know how to make sense of that because
> that requires (a) platform hardware to control main power and (b)
> software that knows how to use that hardware.  Wouldn't this require a
> little more DT description, like "regulator X controls main power for
> this bridge"?  And then an OS would only be able to actually use
> D3cold if it knows how to *operate* the regulator, and it doesn't seem
> like DT could answer that.
> 

Fair point. And for most of the DT based platforms, there is no dedicated power
supply for the bridge described in DT. So transitioning the bridge to D3cold is
not entirely possible in the OS.

Since we concluded that enabling D3hot for all bridges in DT platforms is the
way to go, I'll drop supporting the DT property in next version.

I'll also remove it from the binding.

- Mani

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