From: Frank Li <Frank.Li@nxp.com>
To: "Bjorn Helgaas" <bhelgaas@google.com>,
"Jingoo Han" <jingoohan1@gmail.com>,
"Gustavo Pimentel" <gustavo.pimentel@synopsys.com>,
"Manivannan Sadhasivam" <manivannan.sadhasivam@linaro.org>,
"Lorenzo Pieralisi" <lpieralisi@kernel.org>,
"Krzysztof Wilczyński" <kw@linux.com>,
"Rob Herring" <robh@kernel.org>,
"Krzysztof Kozlowski" <krzysztof.kozlowski+dt@linaro.org>,
"Conor Dooley" <conor+dt@kernel.org>,
imx@lists.linux.dev
Cc: linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org,
devicetree@vger.kernel.org, Frank Li <Frank.Li@nxp.com>,
Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>,
Serge Semin <fancer.lancer@gmail.com>
Subject: [PATCH v5 1/5] PCI: Add INTx Mechanism Messages macros
Date: Tue, 19 Mar 2024 12:07:11 -0400 [thread overview]
Message-ID: <20240319-pme_msg-v5-1-af9ffe57f432@nxp.com> (raw)
In-Reply-To: <20240319-pme_msg-v5-0-af9ffe57f432@nxp.com>
From: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Add "Message Routing" and "INTx Mechanism Messages" macros to enable
a PCIe driver to send messages for INTx Interrupt Signaling.
The "Message Routing" is in the section 2.2.8, and the "INTx Mechanism
Messages" is in the section 2.2.8.1 on the PCI Express Base Specification,
Rev 6.1.
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Reviewed-by: Serge Semin <fancer.lancer@gmail.com>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Acked-by: Bjorn Helgaas <bhelgaas@google.com>
Signed-off-by: Frank Li <Frank.Li@nxp.com>
---
drivers/pci/pci.h | 18 ++++++++++++++++++
1 file changed, 18 insertions(+)
diff --git a/drivers/pci/pci.h b/drivers/pci/pci.h
index 2336a8d1edab2..ffd066c15f3bb 100644
--- a/drivers/pci/pci.h
+++ b/drivers/pci/pci.h
@@ -22,6 +22,24 @@
*/
#define PCIE_PME_TO_L2_TIMEOUT_US 10000
+/* Message Routing (r[2:0]) See: PCIe r6.0, sec 2.2.8 */
+#define PCIE_MSG_TYPE_R_RC 0
+#define PCIE_MSG_TYPE_R_ADDR 1
+#define PCIE_MSG_TYPE_R_ID 2
+#define PCIE_MSG_TYPE_R_BC 3
+#define PCIE_MSG_TYPE_R_LOCAL 4
+#define PCIE_MSG_TYPE_R_GATHER 5
+
+/* INTx Mechanism Messages See: PCIe r6.0, sec 2.2.8.1 */
+#define PCIE_MSG_CODE_ASSERT_INTA 0x20
+#define PCIE_MSG_CODE_ASSERT_INTB 0x21
+#define PCIE_MSG_CODE_ASSERT_INTC 0x22
+#define PCIE_MSG_CODE_ASSERT_INTD 0x23
+#define PCIE_MSG_CODE_DEASSERT_INTA 0x24
+#define PCIE_MSG_CODE_DEASSERT_INTB 0x25
+#define PCIE_MSG_CODE_DEASSERT_INTC 0x26
+#define PCIE_MSG_CODE_DEASSERT_INTD 0x27
+
extern const unsigned char pcie_link_speed[];
extern bool pci_early_dump;
--
2.34.1
next prev parent reply other threads:[~2024-03-19 16:07 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-03-19 16:07 [PATCH v5 0/5] PCI: dwc: Add common pme_turn_off message by using outbound iATU Frank Li
2024-03-19 16:07 ` Frank Li [this message]
2024-03-19 16:07 ` [PATCH v5 2/5] PCI: dwc: Consolidate args of dw_pcie_prog_outbound_atu() into a structure Frank Li
2024-03-19 16:07 ` [PATCH v5 3/5] PCI: dwc: Add outbound MSG TLPs support Frank Li
2024-03-19 16:07 ` [PATCH v5 4/5] PCI: Add PCIE_MSG_CODE_PME_TURN_OFF message macro Frank Li
2024-04-04 15:53 ` Manivannan Sadhasivam
2024-03-19 16:07 ` [PATCH v5 5/5] PCI: dwc: Add common send PME_Turn_Off message method Frank Li
2024-04-05 6:24 ` Manivannan Sadhasivam
2024-04-05 14:31 ` Frank Li
2024-04-06 4:01 ` Manivannan Sadhasivam
2024-04-08 15:11 ` Frank Li
2024-04-12 17:05 ` Manivannan Sadhasivam
2024-04-12 21:08 ` Frank Li
2024-04-14 10:32 ` Manivannan Sadhasivam
2024-04-02 16:15 ` [PATCH v5 0/5] PCI: dwc: Add common pme_turn_off message by using outbound iATU Frank Li
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