From: Damien Le Moal <dlemoal@kernel.org>
To: "Manivannan Sadhasivam" <manivannan.sadhasivam@linaro.org>,
"Lorenzo Pieralisi" <lpieralisi@kernel.org>,
"Kishon Vijay Abraham I" <kishon@kernel.org>,
"Shawn Lin" <shawn.lin@rock-chips.com>,
"Krzysztof Wilczyński" <kw@linux.com>,
"Bjorn Helgaas" <bhelgaas@google.com>,
"Heiko Stuebner" <heiko@sntech.de>,
linux-pci@vger.kernel.org, "Rob Herring" <robh@kernel.org>,
"Krzysztof Kozlowski" <krzysztof.kozlowski+dt@linaro.org>,
"Conor Dooley" <conor+dt@kernel.org>,
devicetree@vger.kernel.org
Cc: linux-rockchip@lists.infradead.org,
linux-arm-kernel@lists.infradead.org,
Rick Wertenbroek <rick.wertenbroek@gmail.com>,
Wilfred Mallawa <wilfred.mallawa@wdc.com>,
Niklas Cassel <cassel@kernel.org>
Subject: [PATCH v2 13/18] PCI: rockchip-ep: Refactor rockchip_pcie_ep_probe() MSI-X hiding
Date: Sat, 30 Mar 2024 13:19:23 +0900 [thread overview]
Message-ID: <20240330041928.1555578-14-dlemoal@kernel.org> (raw)
In-Reply-To: <20240330041928.1555578-1-dlemoal@kernel.org>
Move the code in rockchip_pcie_ep_probe() to hide the MSI-X capability
to its own function, rockchip_pcie_ep_hide_msix_cap(). No functional
changes.
Signed-off-by: Damien Le Moal <dlemoal@kernel.org>
---
drivers/pci/controller/pcie-rockchip-ep.c | 54 +++++++++++++----------
1 file changed, 30 insertions(+), 24 deletions(-)
diff --git a/drivers/pci/controller/pcie-rockchip-ep.c b/drivers/pci/controller/pcie-rockchip-ep.c
index 17d9fe48c621..a7d008d95a8a 100644
--- a/drivers/pci/controller/pcie-rockchip-ep.c
+++ b/drivers/pci/controller/pcie-rockchip-ep.c
@@ -583,6 +583,34 @@ static void rockchip_pcie_ep_release_resources(struct rockchip_pcie_ep *ep)
pci_epc_mem_exit(ep->epc);
}
+static void rockchip_pcie_ep_hide_msix_cap(struct rockchip_pcie *rockchip)
+{
+ u32 cfg_msi, cfg_msix_cp;
+
+ /*
+ * MSI-X is not supported but the controller still advertises the MSI-X
+ * capability by default, which can lead to the Root Complex side
+ * allocating MSI-X vectors which cannot be used. Avoid this by skipping
+ * the MSI-X capability entry in the PCIe capabilities linked-list: get
+ * the next pointer from the MSI-X entry and set that in the MSI
+ * capability entry (which is the previous entry). This way the MSI-X
+ * entry is skipped (left out of the linked-list) and not advertised.
+ */
+ cfg_msi = rockchip_pcie_read(rockchip, PCIE_EP_CONFIG_BASE +
+ ROCKCHIP_PCIE_EP_MSI_CTRL_REG);
+
+ cfg_msi &= ~ROCKCHIP_PCIE_EP_MSI_CP1_MASK;
+
+ cfg_msix_cp = rockchip_pcie_read(rockchip, PCIE_EP_CONFIG_BASE +
+ ROCKCHIP_PCIE_EP_MSIX_CAP_REG) &
+ ROCKCHIP_PCIE_EP_MSIX_CAP_CP_MASK;
+
+ cfg_msi |= cfg_msix_cp;
+
+ rockchip_pcie_write(rockchip, cfg_msi,
+ PCIE_EP_CONFIG_BASE + ROCKCHIP_PCIE_EP_MSI_CTRL_REG);
+}
+
static int rockchip_pcie_ep_probe(struct platform_device *pdev)
{
struct device *dev = &pdev->dev;
@@ -590,7 +618,6 @@ static int rockchip_pcie_ep_probe(struct platform_device *pdev)
struct rockchip_pcie *rockchip;
struct pci_epc *epc;
int err;
- u32 cfg_msi, cfg_msix_cp;
ep = devm_kzalloc(dev, sizeof(*ep), GFP_KERNEL);
if (!ep)
@@ -621,6 +648,8 @@ static int rockchip_pcie_ep_probe(struct platform_device *pdev)
if (err)
goto err_disable_clocks;
+ rockchip_pcie_ep_hide_msix_cap(rockchip);
+
/* Establish the link automatically */
rockchip_pcie_write(rockchip, PCIE_CLIENT_LINK_TRAIN_ENABLE,
PCIE_CLIENT_CONFIG);
@@ -628,29 +657,6 @@ static int rockchip_pcie_ep_probe(struct platform_device *pdev)
/* Only enable function 0 by default */
rockchip_pcie_write(rockchip, BIT(0), PCIE_CORE_PHY_FUNC_CFG);
- /*
- * MSI-X is not supported but the controller still advertises the MSI-X
- * capability by default, which can lead to the Root Complex side
- * allocating MSI-X vectors which cannot be used. Avoid this by skipping
- * the MSI-X capability entry in the PCIe capabilities linked-list: get
- * the next pointer from the MSI-X entry and set that in the MSI
- * capability entry (which is the previous entry). This way the MSI-X
- * entry is skipped (left out of the linked-list) and not advertised.
- */
- cfg_msi = rockchip_pcie_read(rockchip, PCIE_EP_CONFIG_BASE +
- ROCKCHIP_PCIE_EP_MSI_CTRL_REG);
-
- cfg_msi &= ~ROCKCHIP_PCIE_EP_MSI_CP1_MASK;
-
- cfg_msix_cp = rockchip_pcie_read(rockchip, PCIE_EP_CONFIG_BASE +
- ROCKCHIP_PCIE_EP_MSIX_CAP_REG) &
- ROCKCHIP_PCIE_EP_MSIX_CAP_CP_MASK;
-
- cfg_msi |= cfg_msix_cp;
-
- rockchip_pcie_write(rockchip, cfg_msi,
- PCIE_EP_CONFIG_BASE + ROCKCHIP_PCIE_EP_MSI_CTRL_REG);
-
rockchip_pcie_write(rockchip, PCIE_CLIENT_CONF_ENABLE,
PCIE_CLIENT_CONFIG);
--
2.44.0
next prev parent reply other threads:[~2024-03-30 4:20 UTC|newest]
Thread overview: 54+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-03-30 4:19 [PATCH v2 00/18] Improve PCI memory mapping API Damien Le Moal
2024-03-30 4:19 ` [PATCH v2 01/18] PCI: endpoint: Introduce pci_epc_function_is_valid() Damien Le Moal
2024-04-03 6:46 ` Manivannan Sadhasivam
2024-04-05 13:33 ` Niklas Cassel
2024-03-30 4:19 ` [PATCH v2 02/18] PCI: endpoint: Introduce pci_epc_map_align() Damien Le Moal
2024-04-03 7:45 ` Manivannan Sadhasivam
2024-04-03 7:54 ` Damien Le Moal
2024-04-03 9:21 ` Manivannan Sadhasivam
2024-04-03 12:33 ` Kishon Vijay Abraham I
2024-04-04 2:43 ` Damien Le Moal
2024-04-05 12:20 ` Niklas Cassel
2024-04-05 12:43 ` Damien Le Moal
2024-04-05 15:18 ` Niklas Cassel
2024-04-10 11:57 ` Kishon Vijay Abraham I
2024-04-05 8:38 ` Dan Carpenter
2024-03-30 4:19 ` [PATCH v2 03/18] PCI: endpoint: Introduce pci_epc_mem_map()/unmap() Damien Le Moal
2024-04-03 9:48 ` Manivannan Sadhasivam
2024-04-05 14:10 ` Niklas Cassel
2024-03-30 4:19 ` [PATCH v2 04/18] PCI: endpoint: test: Use pci_epc_mem_map/unmap() Damien Le Moal
2024-04-05 13:37 ` Niklas Cassel
2024-03-30 4:19 ` [PATCH v2 05/18] PCI: endpoint: test: Synchronously cancel command handler work Damien Le Moal
2024-04-03 7:47 ` Manivannan Sadhasivam
2024-04-05 13:41 ` Niklas Cassel
2024-03-30 4:19 ` [PATCH v2 06/18] PCI: endpoint: test: Implement link_down event operation Damien Le Moal
2024-04-03 7:48 ` Manivannan Sadhasivam
2024-04-05 13:39 ` Niklas Cassel
2024-04-06 2:24 ` Manivannan Sadhasivam
2024-03-30 4:19 ` [PATCH v2 07/18] PCI: rockchip-ep: Fix address translation unit programming Damien Le Moal
2024-03-30 4:19 ` [PATCH v2 08/18] PCI: rockchip-ep: Use a macro to define EP controller .align feature Damien Le Moal
2024-03-30 4:19 ` [PATCH v2 09/18] PCI: rockchip-ep: Improve rockchip_pcie_ep_unmap_addr() Damien Le Moal
2024-03-30 4:19 ` [PATCH v2 10/18] PCI: rockchip-ep: Improve rockchip_pcie_ep_map_addr() Damien Le Moal
2024-03-30 4:19 ` [PATCH v2 11/18] PCI: rockchip-ep: Implement the map_align endpoint controller operation Damien Le Moal
2024-03-30 4:19 ` [PATCH v2 12/18] PCI: rockchip-ep: Refactor rockchip_pcie_ep_probe() memory allocations Damien Le Moal
2024-03-30 4:19 ` Damien Le Moal [this message]
2024-03-30 4:19 ` [PATCH v2 14/18] PCI: rockchip-ep: Refactor endpoint link training enable Damien Le Moal
2024-03-30 4:19 ` [PATCH v2 15/18] PCI: rockship-ep: Introduce rockchip_pcie_ep_stop() Damien Le Moal
2024-03-30 4:19 ` [PATCH v2 16/18] PCI: rockchip-ep: Improve link training Damien Le Moal
2024-04-03 11:54 ` Rick Wertenbroek
2024-03-30 4:19 ` [PATCH v2 17/18] dt-bindings: pci: rockchip,rk3399-pcie-ep: Add ep-gpios property Damien Le Moal
2024-03-30 9:16 ` Krzysztof Kozlowski
2024-03-31 23:06 ` Damien Le Moal
2024-04-01 9:57 ` Krzysztof Kozlowski
2024-04-01 23:36 ` Damien Le Moal
2024-04-02 7:33 ` Krzysztof Kozlowski
2024-04-02 7:38 ` Damien Le Moal
2024-04-02 7:55 ` Damien Le Moal
2024-04-02 18:10 ` Krzysztof Kozlowski
2024-04-02 23:23 ` Damien Le Moal
2024-04-02 7:38 ` Damien Le Moal
2024-03-30 4:19 ` [PATCH v2 18/18] PCI: rockchip-ep: Handle PERST# signal in endpoint mode Damien Le Moal
2024-04-02 12:36 ` [PATCH v2 00/18] Improve PCI memory mapping API Rick Wertenbroek
2024-04-03 7:50 ` Manivannan Sadhasivam
2024-04-03 7:58 ` Damien Le Moal
2024-04-03 9:25 ` Manivannan Sadhasivam
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