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Subject: Re: [PATCH V6 02/15] PCI/PME: Export pcie_pme_disable_msi() &
 pcie_pme_no_msi() APIs
To:     Bjorn Helgaas <helgaas@kernel.org>
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From:   Vidya Sagar <vidyas@nvidia.com>
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Date:   Tue, 21 May 2019 10:36:47 +0530
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On 5/20/2019 11:27 PM, Bjorn Helgaas wrote:
> On Sat, May 18, 2019 at 07:28:29AM +0530, Vidya Sagar wrote:
>> On 5/18/2019 12:25 AM, Bjorn Helgaas wrote:
>>> On Fri, May 17, 2019 at 11:23:36PM +0530, Vidya Sagar wrote:
>>>> On 5/17/2019 6:54 PM, Bjorn Helgaas wrote:
>>>>> Do you have "lspci -vvxxx" output for the root ports handy?
>>>>>
>>>>> If there's some clue in the standard config space that would tell us
>>>>> that MSI works for some events but not others, we could make the PCI
>>>>> core pay attention it.  That would be the best solution because it
>>>>> wouldn't require Tegra-specific code.
>>>>
>>>> Here is the output of 'lspci vvxxx' for one of Tegra194's root ports.
>>>
>>> Thanks!
>>>
>>> This port advertises both MSI and MSI-X, and neither one is enabled.
>>> This particular port doesn't have a slot, so hotplug isn't applicable
>>> to it.
>>>
>>> But if I understand correctly, if MSI or MSI-X were enabled and the
>>> port had a slot, the port would generate MSI/MSI-X hotplug interrupts.
>>> But PME and AER events would still cause INTx interrupts (even with
>>> MSI or MSI-X enabled).
>>>
>>> Do I have that right?  I just want to make sure that the reason for
>>> PME being INTx is a permanent hardware choice and that it's not
>>> related to MSI and MSI-X currently being disabled.
>>
>> Yes. Thats right. Its hardware choice that our hardware engineers made t=
o
>> use INTx for PME instead of MSI irrespective of MSI/MSI-X enabled/disabl=
ed
>> in the root port.
>=20
> Here are more spec references that seem applicable:
>=20
>    - PCIe r4.0, sec 7.7.1.2 (Message Control Register for MSI) says:
>=20
>        MSI Enable =E2=80=93 If Set and the MSI-X Enable bit in the MSI-X
>        Message Control register (see Section 7.9.2) is Clear, the
>        Function is permitted to use MSI to request service and is
>        prohibited from using INTx interrupts.
>=20
>    - PCIe r4.0, sec 7.7.2.2 (Message Control Register for MSI-X) says:
>=20
>        MSI-X Enable =E2=80=93 If Set and the MSI Enable bit in the MSI Me=
ssage
>        Control register (see Section 6.8.1.3) is Clear, the Function is
>        permitted to use MSI-X to request service and is prohibited from
>        using INTx interrupts (if implemented).
>=20
> I read that to mean a device is prohibited from using MSI/MSI-X for
> some interrupts and INTx for others.  Since Tegra194 cannot use
> MSI/MSI-X for PME, it should use INTx for *all* interrupts.  That
> makes the MSI/MSI-X Capabilities superfluous, and they should be
> omitted.
>=20
> If we set pdev->no_msi for Tegra194, we'll avoid MSI/MSI-X completely,
> so we'll assume *all* interrupts including hotplug will be INTx.  Will
> that work?
Yes. We are fine with having all root port originated interrupts getting ge=
nerated
through INTx instead of MSI/MSI-X.

>=20