From: Tiezhu Yang <yangtiezhu@loongson.cn>
To: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Thomas Bogendoerfer <tsbogend@alpha.franken.de>,
Bjorn Helgaas <bhelgaas@google.com>,
Rob Herring <robh@kernel.org>, Huacai Chen <chenhc@lemote.com>,
Jiaxun Yang <jiaxun.yang@flygoat.com>,
linux-mips@vger.kernel.org, linux-pci@vger.kernel.org,
linux-kernel@vger.kernel.org, Xuefeng Li <lixuefeng@loongson.cn>
Subject: Re: [PATCH v2] PCI: loongson: Use DECLARE_PCI_FIXUP_EARLY for bridge_class_quirk()
Date: Wed, 15 Jul 2020 10:36:36 +0800 [thread overview]
Message-ID: <3dc48f99-68bd-89a9-6cbe-16274e1cf86a@loongson.cn> (raw)
In-Reply-To: <20200714150822.GB14416@e121166-lin.cambridge.arm.com>
On 07/14/2020 11:08 PM, Lorenzo Pieralisi wrote:
> On Tue, Jul 14, 2020 at 03:37:51PM +0800, Tiezhu Yang wrote:
>> On 06/12/2020 09:30 AM, Tiezhu Yang wrote:
>>> Use DECLARE_PCI_FIXUP_EARLY instead of DECLARE_PCI_FIXUP_HEADER
>>> for bridge_class_quirk() in pci-loongson.c, otherwise the fixup
>>> has no effect.
>>>
>>> Fixes: 1f58cca5cf2b ("PCI: Add Loongson PCI Controller support")
>>> Signed-off-by: Tiezhu Yang <yangtiezhu@loongson.cn>
>>> ---
>>>
>>> v2:
>>> - modify the patch subject used with lower case "loongson"
>>>
>>> This patch is based on mips-next tree.
>>>
>>> drivers/pci/controller/pci-loongson.c | 6 +++---
>>> 1 file changed, 3 insertions(+), 3 deletions(-)
>>>
>>> diff --git a/drivers/pci/controller/pci-loongson.c b/drivers/pci/controller/pci-loongson.c
>>> index 459009c..58b862a 100644
>>> --- a/drivers/pci/controller/pci-loongson.c
>>> +++ b/drivers/pci/controller/pci-loongson.c
>>> @@ -37,11 +37,11 @@ static void bridge_class_quirk(struct pci_dev *dev)
>>> {
>>> dev->class = PCI_CLASS_BRIDGE_PCI << 8;
>>> }
>>> -DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_LOONGSON,
>>> +DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_LOONGSON,
>>> DEV_PCIE_PORT_0, bridge_class_quirk);
>>> -DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_LOONGSON,
>>> +DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_LOONGSON,
>>> DEV_PCIE_PORT_1, bridge_class_quirk);
>>> -DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_LOONGSON,
>>> +DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_LOONGSON,
>>> DEV_PCIE_PORT_2, bridge_class_quirk);
>>> static void system_bus_quirk(struct pci_dev *pdev)
>> Hi,
>>
>> Any comments?
Hi Lorenzo,
Thanks for your reply.
> (1) how was this driver tested if this patch is required ? Is it because
> you are testing on a different platform ?
According to the datasheet of Loongson LS7A bridge chip, the old
version of Loongson LS7A PCIE port has a hardware bug about PCI
class.
As far as I know, the latest version has already fixed this bug.
I test it on the old version which has hardware bug.
> (2) Please explain why it is needed (I mean describe what happens
> in current code and how this fixes it) in the commit log, it is
> useful for people who may need to tweak this code further
OK, this patch is to maintain downward compatibility, I will add
more info to the commit message and then send v3.
Thanks,
Tiezhu
>
> I will apply it then, thanks.
>
> Lorenzo
>
>> Could you please apply this patch?
>>
>> Thanks,
>> Tiezhu
>>
prev parent reply other threads:[~2020-07-15 2:37 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-06-12 1:30 [PATCH v2] PCI: loongson: Use DECLARE_PCI_FIXUP_EARLY for bridge_class_quirk() Tiezhu Yang
2020-07-14 7:37 ` Tiezhu Yang
2020-07-14 15:08 ` Lorenzo Pieralisi
2020-07-15 2:36 ` Tiezhu Yang [this message]
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