From: Tom Lendacky <thomas.lendacky@amd.com>
To: Kuppuswamy Sathyanarayanan
<sathyanarayanan.kuppuswamy@linux.intel.com>,
Thomas Gleixner <tglx@linutronix.de>,
Ingo Molnar <mingo@redhat.com>, Borislav Petkov <bp@alien8.de>,
Peter Zijlstra <peterz@infradead.org>,
Andy Lutomirski <luto@kernel.org>,
Bjorn Helgaas <bhelgaas@google.com>,
Richard Henderson <rth@twiddle.net>,
Thomas Bogendoerfer <tsbogend@alpha.franken.de>,
James E J Bottomley <James.Bottomley@HansenPartnership.com>,
Helge Deller <deller@gmx.de>,
"David S . Miller" <davem@davemloft.net>,
Arnd Bergmann <arnd@arndb.de>, Jonathan Corbet <corbet@lwn.net>,
"Michael S . Tsirkin" <mst@redhat.com>,
Paolo Bonzini <pbonzini@redhat.com>,
David Hildenbrand <david@redhat.com>,
Andrea Arcangeli <aarcange@redhat.com>,
Josh Poimboeuf <jpoimboe@redhat.com>
Cc: Peter H Anvin <hpa@zytor.com>,
Dave Hansen <dave.hansen@intel.com>,
Tony Luck <tony.luck@intel.com>,
Dan Williams <dan.j.williams@intel.com>,
Andi Kleen <ak@linux.intel.com>,
Kirill Shutemov <kirill.shutemov@linux.intel.com>,
Sean Christopherson <seanjc@google.com>,
Kuppuswamy Sathyanarayanan <knsathya@kernel.org>,
x86@kernel.org, linux-kernel@vger.kernel.org,
linux-pci@vger.kernel.org, linux-alpha@vger.kernel.org,
linux-mips@vger.kernel.org, linux-parisc@vger.kernel.org,
sparclinux@vger.kernel.org, linux-arch@vger.kernel.org,
linux-doc@vger.kernel.org,
virtualization@lists.linux-foundation.org
Subject: Re: [PATCH v5 07/16] x86/kvm: Use bounce buffers for TD guest
Date: Wed, 20 Oct 2021 11:39:01 -0500 [thread overview]
Message-ID: <42f17b60-9bd4-a8bc-5164-d960e54cd30b@amd.com> (raw)
In-Reply-To: <20211009003711.1390019-8-sathyanarayanan.kuppuswamy@linux.intel.com>
On 10/8/21 7:37 PM, Kuppuswamy Sathyanarayanan wrote:
> From: "Kirill A. Shutemov" <kirill.shutemov@linux.intel.com>
>
> Intel TDX doesn't allow VMM to directly access guest private memory.
> Any memory that is required for communication with VMM must be shared
> explicitly. The same rule applies for any DMA to and from TDX guest.
> All DMA pages had to marked as shared pages. A generic way to achieve
> this without any changes to device drivers is to use the SWIOTLB
> framework.
>
> This method of handling is similar to AMD SEV. So extend this support
> for TDX guest as well. Also since there are some common code between
> AMD SEV and TDX guest in mem_encrypt_init(), move it to
> mem_encrypt_common.c and call AMD specific init function from it
>
> Signed-off-by: Kirill A. Shutemov <kirill.shutemov@linux.intel.com>
> Reviewed-by: Andi Kleen <ak@linux.intel.com>
> Reviewed-by: Tony Luck <tony.luck@intel.com>
> Signed-off-by: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com>
> ---
>
> Changes since v4:
> * Replaced prot_guest_has() with cc_guest_has().
>
> Changes since v3:
> * Rebased on top of Tom Lendacky's protected guest
> changes (https://lore.kernel.org/patchwork/cover/1468760/)
>
> Changes since v1:
> * Removed sme_me_mask check for amd_mem_encrypt_init() in mem_encrypt_init().
>
> arch/x86/include/asm/mem_encrypt_common.h | 3 +++
> arch/x86/kernel/tdx.c | 2 ++
> arch/x86/mm/mem_encrypt.c | 5 +----
> arch/x86/mm/mem_encrypt_common.c | 14 ++++++++++++++
> 4 files changed, 20 insertions(+), 4 deletions(-)
>
> diff --git a/arch/x86/include/asm/mem_encrypt_common.h b/arch/x86/include/asm/mem_encrypt_common.h
> index 697bc40a4e3d..bc90e565bce4 100644
> --- a/arch/x86/include/asm/mem_encrypt_common.h
> +++ b/arch/x86/include/asm/mem_encrypt_common.h
> @@ -8,11 +8,14 @@
>
> #ifdef CONFIG_AMD_MEM_ENCRYPT
> bool amd_force_dma_unencrypted(struct device *dev);
> +void __init amd_mem_encrypt_init(void);
> #else /* CONFIG_AMD_MEM_ENCRYPT */
> static inline bool amd_force_dma_unencrypted(struct device *dev)
> {
> return false;
> }
> +
> +static inline void amd_mem_encrypt_init(void) {}
> #endif /* CONFIG_AMD_MEM_ENCRYPT */
>
> #endif
> diff --git a/arch/x86/kernel/tdx.c b/arch/x86/kernel/tdx.c
> index 433f366ca25c..ce8e3019b812 100644
> --- a/arch/x86/kernel/tdx.c
> +++ b/arch/x86/kernel/tdx.c
> @@ -12,6 +12,7 @@
> #include <asm/insn.h>
> #include <asm/insn-eval.h>
> #include <linux/sched/signal.h> /* force_sig_fault() */
> +#include <linux/swiotlb.h>
>
> /* TDX Module call Leaf IDs */
> #define TDX_GET_INFO 1
> @@ -577,6 +578,7 @@ void __init tdx_early_init(void)
> pv_ops.irq.halt = tdx_halt;
>
> legacy_pic = &null_legacy_pic;
> + swiotlb_force = SWIOTLB_FORCE;
>
> cpuhp_setup_state(CPUHP_AP_ONLINE_DYN, "tdx:cpu_hotplug",
> NULL, tdx_cpu_offline_prepare);
> diff --git a/arch/x86/mm/mem_encrypt.c b/arch/x86/mm/mem_encrypt.c
> index 5d7fbed73949..8385bc4565e9 100644
> --- a/arch/x86/mm/mem_encrypt.c
> +++ b/arch/x86/mm/mem_encrypt.c
> @@ -438,14 +438,11 @@ static void print_mem_encrypt_feature_info(void)
> }
>
> /* Architecture __weak replacement functions */
> -void __init mem_encrypt_init(void)
> +void __init amd_mem_encrypt_init(void)
> {
> if (!sme_me_mask)
> return;
>
> - /* Call into SWIOTLB to update the SWIOTLB DMA buffers */
> - swiotlb_update_mem_attributes();
> -
> /*
> * With SEV, we need to unroll the rep string I/O instructions,
> * but SEV-ES supports them through the #VC handler.
> diff --git a/arch/x86/mm/mem_encrypt_common.c b/arch/x86/mm/mem_encrypt_common.c
> index 119a9056efbb..6fe44c6cb753 100644
> --- a/arch/x86/mm/mem_encrypt_common.c
> +++ b/arch/x86/mm/mem_encrypt_common.c
> @@ -10,6 +10,7 @@
> #include <asm/mem_encrypt_common.h>
> #include <linux/dma-mapping.h>
> #include <linux/cc_platform.h>
> +#include <linux/swiotlb.h>
>
> /* Override for DMA direct allocation check - ARCH_HAS_FORCE_DMA_UNENCRYPTED */
> bool force_dma_unencrypted(struct device *dev)
> @@ -24,3 +25,16 @@ bool force_dma_unencrypted(struct device *dev)
>
> return false;
> }
> +
> +/* Architecture __weak replacement functions */
> +void __init mem_encrypt_init(void)
> +{
> + /*
> + * For TDX guest or SEV/SME, call into SWIOTLB to update
> + * the SWIOTLB DMA buffers
> + */
> + if (sme_me_mask || cc_platform_has(CC_ATTR_GUEST_MEM_ENCRYPT))
Can't you just make this:
if (cc_platform_has(CC_ATTR_MEM_ENCRYPT))
SEV will return true if sme_me_mask is not zero and TDX should only return
true if it is TDX guest, right?
Thanks,
Tom
> + swiotlb_update_mem_attributes();
> +
> + amd_mem_encrypt_init();
> +}
>
next prev parent reply other threads:[~2021-10-20 16:39 UTC|newest]
Thread overview: 83+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-10-09 0:36 [PATCH v5 00/16] Add TDX Guest Support (shared-mm support) Kuppuswamy Sathyanarayanan
2021-10-09 0:36 ` [PATCH v5 01/16] x86/mm: Move force_dma_unencrypted() to common code Kuppuswamy Sathyanarayanan
2021-10-20 16:11 ` Tom Lendacky
2021-10-20 16:43 ` Sathyanarayanan Kuppuswamy
2021-10-09 0:36 ` [PATCH v5 02/16] x86/tdx: Get TD execution environment information via TDINFO Kuppuswamy Sathyanarayanan
2021-10-09 0:36 ` [PATCH v5 03/16] x86/tdx: Exclude Shared bit from physical_mask Kuppuswamy Sathyanarayanan
2021-11-05 22:11 ` Sean Christopherson
2021-11-08 14:45 ` Kirill A. Shutemov
2021-10-09 0:36 ` [PATCH v5 04/16] x86/tdx: Make pages shared in ioremap() Kuppuswamy Sathyanarayanan
2021-10-20 16:03 ` Tom Lendacky
2021-10-20 16:41 ` Sathyanarayanan Kuppuswamy
2021-10-09 0:37 ` [PATCH v5 05/16] x86/tdx: Add helper to do MapGPA hypercall Kuppuswamy Sathyanarayanan
2021-10-09 0:37 ` [PATCH v5 06/16] x86/tdx: Make DMA pages shared Kuppuswamy Sathyanarayanan
2021-10-20 16:33 ` Tom Lendacky
2021-10-20 16:45 ` Sathyanarayanan Kuppuswamy
2021-10-20 17:22 ` Tom Lendacky
2021-10-20 17:26 ` Sathyanarayanan Kuppuswamy
2021-10-09 0:37 ` [PATCH v5 07/16] x86/kvm: Use bounce buffers for TD guest Kuppuswamy Sathyanarayanan
2021-10-20 16:39 ` Tom Lendacky [this message]
2021-10-20 16:50 ` Sathyanarayanan Kuppuswamy
2021-10-20 17:26 ` Tom Lendacky
2021-10-09 0:37 ` [PATCH v5 08/16] x86/tdx: ioapic: Add shared bit for IOAPIC base address Kuppuswamy Sathyanarayanan
2021-10-09 0:37 ` [PATCH v5 09/16] x86/tdx: Enable shared memory confidential guest flags for TDX guest Kuppuswamy Sathyanarayanan
2021-10-09 0:37 ` [PATCH v5 10/16] PCI: Consolidate pci_iomap_range(), pci_iomap_wc_range() Kuppuswamy Sathyanarayanan
2021-10-09 0:37 ` [PATCH v5 11/16] asm/io.h: Add ioremap_host_shared fallback Kuppuswamy Sathyanarayanan
2021-10-09 0:37 ` [PATCH v5 12/16] PCI: Add pci_iomap_host_shared(), pci_iomap_host_shared_range() Kuppuswamy Sathyanarayanan
2021-10-09 9:53 ` Michael S. Tsirkin
2021-10-09 20:39 ` Dan Williams
2021-10-10 22:11 ` Andi Kleen
2021-10-12 17:42 ` Dan Williams
2021-10-12 18:35 ` Andi Kleen
2021-10-12 21:14 ` Dan Williams
2021-10-12 21:18 ` Michael S. Tsirkin
2021-10-12 21:24 ` Andi Kleen
2021-10-12 21:28 ` Andi Kleen
2021-10-12 22:00 ` Dan Williams
2021-10-18 12:13 ` Greg KH
2021-10-12 18:36 ` Reshetova, Elena
2021-10-12 18:38 ` Andi Kleen
2021-10-12 18:57 ` Reshetova, Elena
2021-10-12 19:13 ` Dan Williams
2021-10-12 19:49 ` Andi Kleen
2021-10-12 21:11 ` Michael S. Tsirkin
2021-10-14 6:32 ` Reshetova, Elena
2021-10-14 6:57 ` Michael S. Tsirkin
2021-10-14 7:27 ` Reshetova, Elena
2021-10-14 9:26 ` Michael S. Tsirkin
2021-10-14 12:33 ` Reshetova, Elena
2021-10-17 22:17 ` Michael S. Tsirkin
2021-10-14 11:49 ` Michael S. Tsirkin
2021-10-17 21:52 ` Thomas Gleixner
2021-10-18 7:03 ` Reshetova, Elena
2021-10-18 0:55 ` Thomas Gleixner
2021-10-18 1:10 ` Thomas Gleixner
2021-10-18 12:08 ` Greg KH
2021-10-10 22:22 ` Andi Kleen
2021-10-11 11:59 ` Michael S. Tsirkin
2021-10-11 17:32 ` Andi Kleen
2021-10-11 18:22 ` Michael S. Tsirkin
2021-10-18 12:15 ` Greg KH
2021-10-18 13:17 ` Michael S. Tsirkin
2021-10-11 7:58 ` Christoph Hellwig
2021-10-11 17:23 ` Andi Kleen
2021-10-11 19:09 ` Michael S. Tsirkin
2021-10-12 5:31 ` Christoph Hellwig
2021-10-12 18:37 ` Andi Kleen
2021-10-09 0:37 ` [PATCH v5 13/16] PCI: Mark MSI data shared Kuppuswamy Sathyanarayanan
2021-10-09 0:37 ` [PATCH v5 14/16] virtio: Use shared mappings for virtio PCI devices Kuppuswamy Sathyanarayanan
2021-10-09 0:37 ` [PATCH v5 15/16] x86/tdx: Implement ioremap_host_shared for x86 Kuppuswamy Sathyanarayanan
2021-10-09 0:37 ` [PATCH v5 16/16] x86/tdx: Add cmdline option to force use of ioremap_host_shared Kuppuswamy Sathyanarayanan
2021-10-09 1:45 ` Randy Dunlap
2021-10-09 2:10 ` Kuppuswamy, Sathyanarayanan
2021-10-09 11:04 ` Michael S. Tsirkin
2021-10-11 2:39 ` Andi Kleen
2021-10-11 12:04 ` Michael S. Tsirkin
2021-10-11 17:35 ` Andi Kleen
2021-10-11 18:28 ` Michael S. Tsirkin
2021-10-12 17:55 ` Andi Kleen
2021-10-12 20:59 ` Michael S. Tsirkin
2021-10-12 21:18 ` Andi Kleen
2021-10-12 21:30 ` Michael S. Tsirkin
2021-10-15 5:50 ` Andi Kleen
2021-10-15 6:57 ` Michael S. Tsirkin
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=42f17b60-9bd4-a8bc-5164-d960e54cd30b@amd.com \
--to=thomas.lendacky@amd.com \
--cc=James.Bottomley@HansenPartnership.com \
--cc=aarcange@redhat.com \
--cc=ak@linux.intel.com \
--cc=arnd@arndb.de \
--cc=bhelgaas@google.com \
--cc=bp@alien8.de \
--cc=corbet@lwn.net \
--cc=dan.j.williams@intel.com \
--cc=dave.hansen@intel.com \
--cc=davem@davemloft.net \
--cc=david@redhat.com \
--cc=deller@gmx.de \
--cc=hpa@zytor.com \
--cc=jpoimboe@redhat.com \
--cc=kirill.shutemov@linux.intel.com \
--cc=knsathya@kernel.org \
--cc=linux-alpha@vger.kernel.org \
--cc=linux-arch@vger.kernel.org \
--cc=linux-doc@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-mips@vger.kernel.org \
--cc=linux-parisc@vger.kernel.org \
--cc=linux-pci@vger.kernel.org \
--cc=luto@kernel.org \
--cc=mingo@redhat.com \
--cc=mst@redhat.com \
--cc=pbonzini@redhat.com \
--cc=peterz@infradead.org \
--cc=rth@twiddle.net \
--cc=sathyanarayanan.kuppuswamy@linux.intel.com \
--cc=seanjc@google.com \
--cc=sparclinux@vger.kernel.org \
--cc=tglx@linutronix.de \
--cc=tony.luck@intel.com \
--cc=tsbogend@alpha.franken.de \
--cc=virtualization@lists.linux-foundation.org \
--cc=x86@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).