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From: Suzuki K Poulose <suzuki.poulose@arm.com>
To: Yicong Yang <yangyicong@hisilicon.com>,
	linux-kernel@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org, coresight@lists.linaro.org,
	linux-pci@vger.kernel.org
Cc: alexander.shishkin@linux.intel.com, helgaas@kernel.org,
	gregkh@linuxfoundation.org, lorenzo.pieralisi@arm.com,
	will@kernel.org, mark.rutland@arm.com,
	mathieu.poirier@linaro.org, mike.leach@linaro.org,
	leo.yan@linaro.org, jonathan.cameron@huawei.com,
	song.bao.hua@hisilicon.com, john.garry@huawei.com,
	prime.zeng@huawei.com, liuqi115@huawei.com,
	zhangshaokun@hisilicon.com, linuxarm@huawei.com
Subject: Re: [PATCH RESEND 0/4] Add support for HiSilicon PCIe Tune and Trace device
Date: Mon, 19 Apr 2021 12:17:41 +0100	[thread overview]
Message-ID: <529defac-cd67-3a7b-91d3-76eb0bb9dc6c@arm.com> (raw)
In-Reply-To: <1618654631-42454-1-git-send-email-yangyicong@hisilicon.com>

On 17/04/2021 11:17, Yicong Yang wrote:
> [RESEND with perf and coresight folks Cc'ed]
> 
> HiSilicon PCIe tune and trace device (PTT) is a PCIe Root Complex
> integrated Endpoint (RCiEP) device, providing the capability
> to dynamically monitor and tune the PCIe traffic (tune),
> and trace the TLP headers (trace).
> 
> PTT tune is designed for monitoring and adjusting PCIe link parameters.
> We provide several parameters of the PCIe link. Through the driver,
> user can adjust the value of certain parameter to affect the PCIe link
> for the purpose of enhancing the performance in certian situation.

...

> 
> The reason for not using perf is because there is no current support
> for uncore tracing in the perf facilities. We have our own format
> of data and don't need perf doing the parsing. The setting through
> perf tools doesn't seem to be friendly as well. For example,
> we cannot count on perf to decode the usual format BDF number like
> <domain>:<bus>:<dev>.<fn>, which user can use to filter the TLP
> headers through the PTT device.
> 
> A similar approach for implementing this function is ETM, which use
> sysfs for configuring and a character device for dumping data.
> 
> Greg has some comments on our implementation and doesn't advocate
> to build driver on debugfs [1]. So I resend this series to
> collect more feedbacks on the implementation of this driver.
> 
> Hi perf and ETM related experts, is it suggested to adapt this driver
> to perf? Or is the debugfs approach acceptable? Otherwise use
> sysfs + character device like ETM and use perf tools for decoding it?
> Any comments is welcomed.

Please use perf. Debugfs / sysfs is not the right place for these things.

Also, please move your driver to drivers/perf/

As Alex mentioned, the ETM drivers were initially developed when the AUX
buffer was not available. The sysfs interface is there only for the 
backward compatibility and for bring up ( due to the nature of the
connections between the CoreSight components and sometimes the missing 
engineering spec).

Suzuki

  parent reply	other threads:[~2021-04-19 11:17 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-04-17 10:17 [PATCH RESEND 0/4] Add support for HiSilicon PCIe Tune and Trace device Yicong Yang
2021-04-17 10:17 ` [PATCH RESEND 1/4] hwtracing: Add trace function " Yicong Yang
2021-04-17 10:17 ` [PATCH RESEND 2/4] hwtracing: Add tune " Yicong Yang
2021-04-17 10:17 ` [PATCH RESEND 3/4] docs: Add HiSilicon PTT device driver documentation Yicong Yang
2021-04-19  9:07   ` Daniel Thompson
2021-04-19 13:12     ` Yicong Yang
2021-04-17 10:17 ` [PATCH RESEND 4/4] MAINTAINERS: Add maintainer for HiSilicon PTT driver Yicong Yang
2021-04-17 13:56 ` [PATCH RESEND 0/4] Add support for HiSilicon PCIe Tune and Trace device Alexander Shishkin
2021-04-19 13:03   ` Yicong Yang
2021-04-22  3:49     ` Leo Yan
2021-04-22 12:54       ` Yicong Yang
2021-04-19 11:17 ` Suzuki K Poulose [this message]
2021-04-19 13:21   ` Yicong Yang
2021-04-19 16:11     ` Suzuki K Poulose

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