From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from comal.ext.ti.com ([198.47.26.152]:43502 "EHLO comal.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755357AbaENNU7 (ORCPT ); Wed, 14 May 2014 09:20:59 -0400 Message-ID: <53736DA1.4040405@ti.com> Date: Wed, 14 May 2014 16:20:33 +0300 From: Roger Quadros MIME-Version: 1.0 To: Kishon Vijay Abraham I , , , , , , CC: Subject: Re: [PATCH 04/17] phy: pipe3: insert delay to enumerate in GEN2 mode References: <1399383244-14556-1-git-send-email-kishon@ti.com> <1399383244-14556-5-git-send-email-kishon@ti.com> In-Reply-To: <1399383244-14556-5-git-send-email-kishon@ti.com> Content-Type: text/plain; charset="ISO-8859-1" Sender: linux-pci-owner@vger.kernel.org List-ID: On 05/06/2014 04:33 PM, Kishon Vijay Abraham I wrote: > 8-bit delay value (0xF1) is required for GEN2 devices to be enumerated > consistently. Added an API to be called from PHY drivers to set this delay > value and called it from PIPE3 driver to set the delay value. > > Signed-off-by: Kishon Vijay Abraham I Reviewed-by: Roger Quadros -- cheers, -roger