From: "Jiaxun Yang" <jiaxun.yang@flygoat.com>
To: "Bjorn Helgaas" <helgaas@kernel.org>,
"Huacai Chen" <chenhuacai@gmail.com>
Cc: "Huacai Chen" <chenhuacai@loongson.cn>,
"Bjorn Helgaas" <bhelgaas@google.com>,
linux-pci <linux-pci@vger.kernel.org>,
"Xuefeng Li" <lixuefeng@loongson.cn>,
"Jianmin Lv" <lvjianmin@loongson.cn>,
"Rob Herring" <robh+dt@kernel.org>
Subject: Re: [PATCH V2 4/4] PCI: Add quirk for multifunction devices of LS7A
Date: Sun, 06 Jun 2021 16:01:02 +0800 [thread overview]
Message-ID: <56dcd0ca-f6c5-4653-a028-f70d274497ab@www.fastmail.com> (raw)
In-Reply-To: <20210605212854.GA2324905@bjorn-Precision-5520>
在2021年6月6日六月 上午5:28，Bjorn Helgaas写道：
> both ACPI and DT to rely on it.
>
> But this quirk applies to [0014:7a09], [0014:7a19], and [0014:7a29],
> which look like they are PCIe Root Ports, and your DT ([2]) *does*
> seem to describe them with interrupt descriptions. So I assume the
> reason DT systems don't care about this quirk is because they use this
> IRQ info from DT and ignore the PCI_INTERRUPT_PIN?
>
> If DT systems ignore the quirk, as you said above, I assume that means
> that DT overwrites dev->pin sometime *after* the quirk executes? Or
> there's some DT check that means we ignore dev->pin? Can you point me
> to whatever this mechanism is?
dev->pin won't affect hardware behavior. The only place that kernel uses
dev->pin is mapping them to the actual IRQ number. For DT based system, this
is handled by of_irq_parse_pci.
For the present system, all four INTA,B,C,D are routed to the same upstream IRQ,
thus wrong dev->pin will still get correct mapping.
I'm unable to get my hand on an ACPI system but I guess Loongson uses different
mapping scheme on these systems so dev->pin will matter.
Thanks.
--
- Jiaxun
prev parent reply other threads:[~2021-06-06 8:01 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-05-28 7:14 [PATCH V2 0/4] PCI: Loongson-related pci quirks Huacai Chen
2021-05-28 7:15 ` [PATCH V2 1/4] PCI/portdrv: Don't disable device during shutdown Huacai Chen
2021-05-28 21:43 ` Bjorn Helgaas
2021-06-04 9:24 ` Huacai Chen
2021-06-07 20:43 ` Sinan Kaya
2021-06-12 4:31 ` Huacai Chen
2021-05-28 7:15 ` [PATCH V2 2/4] PCI: Move loongson pci quirks to quirks.c Huacai Chen
2021-06-05 21:15 ` Bjorn Helgaas
2021-06-06 8:14 ` LoongArch (was: Re: [PATCH V2 2/4] PCI: Move loongson pci quirks to quirks.c) Jiaxun Yang
2021-06-07 0:51 ` Huacai Chen
2021-05-28 7:15 ` [PATCH V2 3/4] PCI: Improve the MRRS quirk for LS7A Huacai Chen
2021-05-28 20:32 ` Bjorn Helgaas
2021-06-04 9:43 ` Huacai Chen
2021-06-05 21:34 ` Bjorn Helgaas
2021-06-12 4:16 ` Huacai Chen
2021-05-28 7:15 ` [PATCH V2 4/4] PCI: Add quirk for multifunction devices of LS7A Huacai Chen
2021-05-28 20:51 ` Bjorn Helgaas
2021-06-04 9:59 ` Huacai Chen
2021-06-05 21:28 ` Bjorn Helgaas
2021-06-06 8:01 ` Jiaxun Yang [this message]
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