From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id B7B62C0502C for ; Wed, 31 Aug 2022 08:36:57 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230381AbiHaIg4 (ORCPT ); Wed, 31 Aug 2022 04:36:56 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:47258 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230480AbiHaIg4 (ORCPT ); Wed, 31 Aug 2022 04:36:56 -0400 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 12E50A8CFC; Wed, 31 Aug 2022 01:36:55 -0700 (PDT) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id E24E7ED1; Wed, 31 Aug 2022 01:37:00 -0700 (PDT) Received: from [10.57.15.237] (unknown [10.57.15.237]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id EE5C23F766; Wed, 31 Aug 2022 01:36:51 -0700 (PDT) Message-ID: <63a54a1b-66ba-9739-8217-13f75e602cd5@arm.com> Date: Wed, 31 Aug 2022 09:36:46 +0100 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Windows NT 10.0; rv:102.0) Gecko/20100101 Thunderbird/102.2.0 Subject: Re: [PATCH v5 20/20] PCI: dwc: Add Baikal-T1 PCIe controller support Content-Language: en-GB To: Lorenzo Pieralisi , Serge Semin Cc: Rob Herring , Rob Herring , Krzysztof Kozlowski , Bjorn Helgaas , Lorenzo Pieralisi , Jingoo Han , Gustavo Pimentel , =?UTF-8?Q?Krzysztof_Wilczy=c5=84ski?= , Serge Semin , Alexey Malahov , Pavel Parkhomenko , Frank Li , Manivannan Sadhasivam , linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, willmcvicker@google.com References: <20220822184701.25246-1-Sergey.Semin@baikalelectronics.ru> <20220822184701.25246-21-Sergey.Semin@baikalelectronics.ru> From: Robin Murphy In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org On 2022-08-29 16:28, Lorenzo Pieralisi wrote: [...] >> +static int bt1_pcie_add_port(struct bt1_pcie *btpci) >> +{ >> + struct device *dev = &btpci->pdev->dev; >> + int ret; >> + >> + /* >> + * DW PCIe Root Port controller is equipped with eDMA capable of >> + * working with the 64-bit memory addresses. >> + */ >> + ret = dma_set_mask_and_coherent(dev, DMA_BIT_MASK(64)); >> + if (ret) >> + return ret; > > Is this the right place to set the DMA mask for the host controller > embedded DMA controller (actually, the dev pointer is the _host_ > controller device) ? > > How this is going to play when combined with: > > https://lore.kernel.org/linux-pci/1e63a581-14ae-b4b5-a5bf-ca8f09c33af6@arm.com > > It is getting a bit confusing. I believe the code in the link > above sets the mask so that through the DMA API we are capable > of getting an MSI doorbell virtual address whose physical address > can be addressed by the endpoint; this through the DMA API. > > This patch is setting the DMA mask for a different reason, namely > setting the host controller embedded DMA controller addressing > capabilities. > > AFAICS - both approaches set the mask for the same device - now > the question is about which one is legitimate and how to handle > the other. Assuming the dw-edma-pcie driver is the relevant one, that already sets its own masks on its own device, so I also don't see why this is here. Thanks, Robin.