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From: Michal Simek <michal.simek@amd.com>
To: "Sean Anderson" <sean.anderson@linux.dev>,
	"Lorenzo Pieralisi" <lpieralisi@kernel.org>,
	"Krzysztof Wilczyński" <kw@linux.com>,
	"Rob Herring" <robh@kernel.org>,
	linux-pci@vger.kernel.org, "Gogada,
	Bharat Kumar" <bharat.kumar.gogada@amd.com>
Cc: linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org,
	Thippeswamy Havalige <thippeswamy.havalige@amd.com>,
	Bjorn Helgaas <bhelgaas@google.com>
Subject: Re: [PATCH 7/7] [RFT] arm64: zynqmp: Add PCIe phys
Date: Tue, 23 Apr 2024 08:15:42 +0200	[thread overview]
Message-ID: <6f7355f6-ae84-4246-83ad-3450e036b111@amd.com> (raw)
In-Reply-To: <20240422195904.3591683-8-sean.anderson@linux.dev>

Hi Bharat,

On 4/22/24 21:59, Sean Anderson wrote:
> Add PCIe phy bindings for the ZCU102.
> 
> Signed-off-by: Sean Anderson <sean.anderson@linux.dev>
> ---
> I don't have a ZCU102, so please test this.
> 
>   arch/arm64/boot/dts/xilinx/zynqmp-zcu102-revA.dts | 2 ++
>   1 file changed, 2 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-revA.dts b/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-revA.dts
> index ad8f23a0ec67..68fe53685351 100644
> --- a/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-revA.dts
> +++ b/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-revA.dts
> @@ -941,6 +941,8 @@ conf-pull-none {
>   
>   &pcie {
>   	status = "okay";
> +	phys = <&psgtr 0 PHY_TYPE_PCIE 0 0>;
> +	phy-names = "pcie-phy0";
>   };
>   
>   &psgtr {

Please review and test this series.

Thanks,
Michal

  reply	other threads:[~2024-04-23  6:15 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-04-22 19:58 [PATCH 0/7] PCI: xilinx-nwl: Add phy support Sean Anderson
2024-04-22 19:58 ` [PATCH 1/7] dt-bindings: pci: xilinx-nwl: Add phys Sean Anderson
2024-04-22 21:28   ` Rob Herring
2024-04-22 21:30     ` Sean Anderson
2024-04-23 12:38       ` Rob Herring
2024-04-23 12:44   ` Rob Herring
2024-04-23 15:18     ` Sean Anderson
2024-04-23 18:43   ` kernel test robot
2024-04-22 19:58 ` [PATCH 2/7] PCI: xilinx-nwl: Fix off-by-one Sean Anderson
2024-04-22 19:59 ` [PATCH 3/7] PCI: xilinx-nwl: Fix register misspelling Sean Anderson
2024-04-22 19:59 ` [PATCH 4/7] PCI: xilinx-nwl: Rate-limit misc interrupt messages Sean Anderson
2024-04-22 19:59 ` [PATCH 5/7] PCI: xilinx-nwl: Clean up clock on probe failure/removal Sean Anderson
2024-04-22 19:59 ` [PATCH 6/7] PCI: xilinx-nwl: Add phy support Sean Anderson
2024-04-22 19:59 ` [PATCH 7/7] [RFT] arm64: zynqmp: Add PCIe phys Sean Anderson
2024-04-23  6:15   ` Michal Simek [this message]
2024-04-24  9:11     ` Havalige, Thippeswamy
2024-04-24 11:27       ` Michal Simek
2024-04-24 12:37         ` Havalige, Thippeswamy

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