From: "Kuppuswamy, Sathyanarayanan" <sathyanarayanan.kuppuswamy@linux.intel.com>
To: "Derrick, Jonathan" <jonathan.derrick@intel.com>,
"helgaas@kernel.org" <helgaas@kernel.org>
Cc: "rajatja@google.com" <rajatja@google.com>,
"kbusch@kernel.org" <kbusch@kernel.org>,
"ruscur@russell.cc" <ruscur@russell.cc>,
"fred@fredlawl.com" <fred@fredlawl.com>,
"Wysocki, Rafael J" <rafael.j.wysocki@intel.com>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"alex.williamson@redhat.com" <alex.williamson@redhat.com>,
"sbobroff@linux.ibm.com" <sbobroff@linux.ibm.com>,
"olof@lixom.net" <olof@lixom.net>,
"oohall@gmail.com" <oohall@gmail.com>,
"mika.westerberg@linux.intel.com"
<mika.westerberg@linux.intel.com>,
"linuxppc-dev@lists.ozlabs.org" <linuxppc-dev@lists.ozlabs.org>,
"bhelgaas@google.com" <bhelgaas@google.com>,
"Patel, Mayurkumar" <mayurkumar.patel@intel.com>,
"andriy.shevchenko@linux.intel.com"
<andriy.shevchenko@linux.intel.com>,
"linux-pci@vger.kernel.org" <linux-pci@vger.kernel.org>
Subject: Re: [PATCH v2 2/2] PCI/DPC: Allow Native DPC Host Bridges to use DPC
Date: Sat, 25 Apr 2020 13:46:45 -0700 [thread overview]
Message-ID: <7e574cc1-a24b-5c4b-7d4f-3fda3f395390@linux.intel.com> (raw)
In-Reply-To: <ea21d9475b0af277c7288504ff2cd32b3f91e4ba.camel@intel.com>
On 4/23/20 8:11 AM, Derrick, Jonathan wrote:
> Hi Sathyanarayanan,
>
> On Wed, 2020-04-22 at 15:50 -0700, Kuppuswamy, Sathyanarayanan wrote:
>>
>> On 4/20/20 2:37 PM, Jon Derrick wrote:
>>> The existing portdrv model prevents DPC services without either OS
>>> control (_OSC) granted to AER services, a Host Bridge requesting Native
>>> AER, or using one of the 'pcie_ports=' parameters of 'native' or
>>> 'dpc-native'.
>>>
>>> The DPC port service driver itself will also fail to probe if the kernel
>>> assumes the port is using Firmware-First AER. It's a reasonable
>>> expectation that a port using Firmware-First AER will also be using
>>> Firmware-First DPC, however if a Host Bridge requests Native DPC, the
>>> DPC driver should allow it and not fail to bind due to AER capability
>>> settings.
>>>
>>> Host Bridges which request Native DPC port services will also likely
>>> request Native AER, however it shouldn't be a requirement. This patch
>>> allows ports on those Host Bridges to have DPC port services.
>>>
>>> This will avoid the unlikely situation where the port is Firmware-First
>>> AER and Native DPC, and a BIOS or switch firmware preconfiguration of
>>> the DPC trigger could result in unhandled DPC events.
>>>
>>> Signed-off-by: Jon Derrick <jonathan.derrick@intel.com>
>>> ---
>>> drivers/pci/pcie/dpc.c | 3 ++-
>>> drivers/pci/pcie/portdrv_core.c | 3 ++-
>>> 2 files changed, 4 insertions(+), 2 deletions(-)
>>>
>>> diff --git a/drivers/pci/pcie/dpc.c b/drivers/pci/pcie/dpc.c
>>> index 7621704..3f3106f 100644
>>> --- a/drivers/pci/pcie/dpc.c
>>> +++ b/drivers/pci/pcie/dpc.c
>>> @@ -284,7 +284,8 @@ static int dpc_probe(struct pcie_device *dev)
>>> int status;
>>> u16 ctl, cap;
>>>
>>> - if (pcie_aer_get_firmware_first(pdev) && !pcie_ports_dpc_native)
>>> + if (pcie_aer_get_firmware_first(pdev) && !pcie_ports_dpc_native &&
>>> + !pci_find_host_bridge(pdev->bus)->native_dpc)
>> Why do it in probe as well ? if host->native_dpc is not set then the
>> device DPC probe it self won't happen right ?
>
> Portdrv only enables the interrupt and allows the probe to occur.
Please check the following snippet of code (from portdrv_core.c).
IIUC, pcie_device_init() will not be called if PCIE_PORT_SERVICE_DPC is
not set in capabilities. Your change in portdrv_core.c already
selectively enables the PCIE_PORT_SERVICE_DPC service based on
native_dpc value.
So IMO, adding native_dpc check in dpc_probe() is redundant.
int pcie_port_device_register(struct pci_dev *dev)
/* Allocate child services if any */
status = -ENODEV;
nr_service = 0;
for (i = 0; i < PCIE_PORT_DEVICE_MAXSERVICES; i++) {
int service = 1 << i;
if (!(capabilities & service))
continue;
if (!pcie_device_init(dev, service, irqs[i]))
nr_service++;
}
>
> The probe itself will still fail if there's a mixed-mode _OSC
> negotiated AER & DPC, due to pcie_aer_get_firmware_first returning 1
> for AER and no check for DPC.
>
> I don't know if such a platform will exist, but the kernel is already
> wired for 'dpc-native' so it makes sense to extend it for this..
>
> This transform might be more readable:
> if (pcie_aer_get_firmware_first(pdev) &&
> !(pcie_ports_dpc_native || hb->native_dpc))
>
>
>
>>> return -ENOTSUPP;
>>>
>>> status = devm_request_threaded_irq(device, dev->irq, dpc_irq,
>>> diff --git a/drivers/pci/pcie/portdrv_core.c b/drivers/pci/pcie/portdrv_core.c
>>> index 50a9522..f2139a1 100644
>>> --- a/drivers/pci/pcie/portdrv_core.c
>>> +++ b/drivers/pci/pcie/portdrv_core.c
>>> @@ -256,7 +256,8 @@ static int get_port_device_capability(struct pci_dev *dev)
>>> */
>>> if (pci_find_ext_capability(dev, PCI_EXT_CAP_ID_DPC) &&
>>> pci_aer_available() &&
>>> - (pcie_ports_dpc_native || (services & PCIE_PORT_SERVICE_AER)))
>>> + (pcie_ports_dpc_native || host->native_dpc ||
>>> + (services & PCIE_PORT_SERVICE_AER)))
>>> services |= PCIE_PORT_SERVICE_DPC;
>>>
>>> if (pci_pcie_type(dev) == PCI_EXP_TYPE_DOWNSTREAM ||
>>>
next prev parent reply other threads:[~2020-04-25 20:46 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-04-20 21:37 [PATCH v2 0/2] Honoring Native AER/DPC Host Bridges Jon Derrick
2020-04-20 21:37 ` [PATCH v2 1/2] PCI/AER: Allow Native AER Host Bridges to use AER Jon Derrick
2020-04-22 22:48 ` Kuppuswamy, Sathyanarayanan
2020-04-23 15:11 ` Derrick, Jonathan
2020-04-24 23:30 ` Bjorn Helgaas
2020-04-27 16:11 ` Derrick, Jonathan
2020-04-27 22:14 ` Bjorn Helgaas
2020-04-20 21:37 ` [PATCH v2 2/2] PCI/DPC: Allow Native DPC Host Bridges to use DPC Jon Derrick
2020-04-22 22:50 ` Kuppuswamy, Sathyanarayanan
2020-04-23 15:11 ` Derrick, Jonathan
2020-04-25 20:46 ` Kuppuswamy, Sathyanarayanan [this message]
2020-04-27 15:15 ` Derrick, Jonathan
2020-04-27 15:43 ` Kuppuswamy, Sathyanarayanan
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