From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-1.1 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS, URIBL_BLOCKED autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 64344C2BA83 for ; Sat, 15 Feb 2020 10:36:41 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 2EB202084E for ; Sat, 15 Feb 2020 10:36:41 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1581763001; bh=5YkV4uYVH10wCnyRijcEs1e3QeLeB2ohGnC0ChbJrhI=; h=Date:From:To:Cc:Subject:In-Reply-To:References:List-ID:From; b=Zk98a+yXFOPJ8yf1N9oT2qUAoZZFlmCzg5vJ1J6CoqhrWASY9SD1G44vmm+2i/I0Y nEFdWp3zEitAQq5XEsl/A1+Az2bJZeSvphXFt9dp/CJtZ43Wrwxznbxqry9/n7qNIf NNfoXHyW0TneFTZhdpVQJKHvrn8hzFUx228aE6po= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1725937AbgBOKgk (ORCPT ); Sat, 15 Feb 2020 05:36:40 -0500 Received: from mail.kernel.org ([198.145.29.99]:55544 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725914AbgBOKgk (ORCPT ); Sat, 15 Feb 2020 05:36:40 -0500 Received: from disco-boy.misterjones.org (disco-boy.misterjones.org [51.254.78.96]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id B280F2083B; Sat, 15 Feb 2020 10:36:39 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1581762999; bh=5YkV4uYVH10wCnyRijcEs1e3QeLeB2ohGnC0ChbJrhI=; h=Date:From:To:Cc:Subject:In-Reply-To:References:From; b=AmmUqJL5Z3hpRt/N9ljehOySU7J1Qv+2BRKBdCrzxgRl3fmZkXzn4OoPbOQfdI+70 kXmUZPtDDF/7NZxe6vZoC7hLTsjGZ28iCF/gLNPRpLZS4yceohK8okLyBiK3YLaxZR /TIXu0uCpdPjvnISQwOyt1PbvAeW0th4ZwNOt8M4= Received: from 78.163-31-62.static.virginmediabusiness.co.uk ([62.31.163.78] helo=big-swifty.misterjones.org) by disco-boy.misterjones.org with esmtpsa (TLS1.3:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.92) (envelope-from ) id 1j2uoQ-005Qs9-09; Sat, 15 Feb 2020 10:36:38 +0000 Date: Sat, 15 Feb 2020 10:36:36 +0000 Message-ID: <867e0o6ssr.wl-maz@kernel.org> From: Marc Zyngier To: Ard Biesheuvel Cc: Alan Mikhak , Joao Pinto , Bjorn Helgaas , Graeme Gregory , Jingoo Han , linux-arm-kernel , linux-pci , Leif Lindholm Subject: Re: [PATCH 2/3] pci: designware: add separate driver for the MSI part of the RC In-Reply-To: References: <20170821192907.8695-3-ard.biesheuvel@linaro.org> <1581728065-5862-1-git-send-email-alan.mikhak@sifive.com> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL/10.8 EasyPG/1.0.0 Emacs/26 (aarch64-unknown-linux-gnu) MULE/6.0 (HANACHIRUSATO) MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII X-SA-Exim-Connect-IP: 62.31.163.78 X-SA-Exim-Rcpt-To: ardb@kernel.org, alan.mikhak@sifive.com, Joao.Pinto@synopsys.com, bhelgaas@google.com, graeme.gregory@linaro.org, jingoohan1@gmail.com, linux-arm-kernel@lists.infradead.org, linux-pci@vger.kernel.org, leif@nuviainc.com X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org On Sat, 15 Feb 2020 09:35:56 +0000, Ard Biesheuvel wrote: > > (updated some email addresses in cc, including my own) > > On Sat, 15 Feb 2020 at 01:54, Alan Mikhak wrote: > > > > Hi.. > > > > What is the right approach for adding MSI support for the generic > > Linux PCI host driver? > > > > I came across this patch which seems to address a similar > > situation. It seems to have been dropped in v3 of the patchset > > with the explanation "drop MSI patch [for now], since it > > turns out we may not need it". > > > > [PATCH 2/3] pci: designware: add separate driver for the MSI part of the RC > > https://lore.kernel.org/linux-pci/20170821192907.8695-3-ard.biesheuvel@linaro.org/ > > > > [PATCH v2 2/3] pci: designware: add separate driver for the MSI part of the RC > > https://lore.kernel.org/linux-pci/20170824184321.19432-3-ard.biesheuvel@linaro.org/ > > > > [PATCH v3 0/2] pci: add support for firmware initialized designware RCs > > https://lore.kernel.org/linux-pci/20170828180437.2646-1-ard.biesheuvel@linaro.org/ > > > > For the platform in question, it turned out that we could use the MSI > block of the core's GIC interrupt controller directly, which is a much > better solution. > > In general, turning MSIs into wired interrupts is not a great idea, > since the whole point of MSIs is that they are sufficiently similar to > other DMA transactions to ensure that the interrupt won't arrive > before the related memory transactions have completed. > > If your interrupt controller does not have this capability, then yes, > you are stuck with this little widget that decodes an inbound write to > a magic address and turns it into a wired interrupt. I can only second this. It is much better to have a generic block implementing MSI *in a non multiplexed way*, for multiple reasons: - the interrupt vs DMA race that Ard mentions above, - MSIs are very often used to describe the state of per-CPU queues. If you multiplex MSIs behind a single multiplexing interrupt, it is always the same CPU that gets interrupted, and you don't benefit from having multiple queues at all. Even if you have to implement the support as a bunch of wired interrupts, there is still a lot of value in keeping a 1:1 mapping between MSIs and wires. Thanks, M. -- Jazz is not dead, it just smells funny.