From: Matthias Brugger <matthias.bgg@gmail.com>
To: Tinghan Shen <tinghan.shen@mediatek.com>,
Ryder Lee <ryder.lee@mediatek.com>,
Jianjun Wang <jianjun.wang@mediatek.com>,
Bjorn Helgaas <bhelgaas@google.com>,
Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>
Cc: linux-pci@vger.kernel.org, linux-mediatek@lists.infradead.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
Project_Global_Chrome_Upstream_Group@mediatek.com,
Irui Wang <irui.wang@mediatek.com>
Subject: Re: [PATCH v5 3/3] arm64: dts: mt8195: Add venc node
Date: Tue, 8 Nov 2022 19:39:25 +0100 [thread overview]
Message-ID: <8e8bf059-7347-3586-0cc9-e02c007de9b2@gmail.com> (raw)
In-Reply-To: <20221103025656.8714-4-tinghan.shen@mediatek.com>
On 03/11/2022 03:56, Tinghan Shen wrote:
> Add venc node for mt8195 SoC.
>
> Signed-off-by: Irui Wang <irui.wang@mediatek.com>
> Signed-off-by: Tinghan Shen <tinghan.shen@mediatek.com>
> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Applied this patch, for the 2/3 we need PCIe maintainer to take the binding
change or provide an ACked by.
Regards,
Matthias
> ---
> arch/arm64/boot/dts/mediatek/mt8195.dtsi | 24 ++++++++++++++++++++++++
> 1 file changed, 24 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/mediatek/mt8195.dtsi b/arch/arm64/boot/dts/mediatek/mt8195.dtsi
> index 7d74a5211091..dbfc15174de3 100644
> --- a/arch/arm64/boot/dts/mediatek/mt8195.dtsi
> +++ b/arch/arm64/boot/dts/mediatek/mt8195.dtsi
> @@ -2109,6 +2109,30 @@
> power-domains = <&spm MT8195_POWER_DOMAIN_VENC>;
> };
>
> + venc: video-codec@1a020000 {
> + compatible = "mediatek,mt8195-vcodec-enc";
> + reg = <0 0x1a020000 0 0x10000>;
> + iommus = <&iommu_vdo M4U_PORT_L19_VENC_RCPU>,
> + <&iommu_vdo M4U_PORT_L19_VENC_REC>,
> + <&iommu_vdo M4U_PORT_L19_VENC_BSDMA>,
> + <&iommu_vdo M4U_PORT_L19_VENC_SV_COMV>,
> + <&iommu_vdo M4U_PORT_L19_VENC_RD_COMV>,
> + <&iommu_vdo M4U_PORT_L19_VENC_CUR_LUMA>,
> + <&iommu_vdo M4U_PORT_L19_VENC_CUR_CHROMA>,
> + <&iommu_vdo M4U_PORT_L19_VENC_REF_LUMA>,
> + <&iommu_vdo M4U_PORT_L19_VENC_REF_CHROMA>;
> + interrupts = <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH 0>;
> + mediatek,scp = <&scp>;
> + clocks = <&vencsys CLK_VENC_VENC>;
> + clock-names = "venc_sel";
> + assigned-clocks = <&topckgen CLK_TOP_VENC>;
> + assigned-clock-parents = <&topckgen CLK_TOP_UNIVPLL_D4>;
> + power-domains = <&spm MT8195_POWER_DOMAIN_VENC>;
> + #address-cells = <2>;
> + #size-cells = <2>;
> + dma-ranges = <0x1 0x0 0x0 0x40000000 0x0 0xfff00000>;
> + };
> +
> vencsys_core1: clock-controller@1b000000 {
> compatible = "mediatek,mt8195-vencsys_core1";
> reg = <0 0x1b000000 0 0x1000>;
next prev parent reply other threads:[~2022-11-08 18:39 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-11-03 2:56 [PATCH v5 0/3] Add driver nodes for MT8195 SoC Tinghan Shen
2022-11-03 2:56 ` [PATCH v5 1/3] dt-bindings: PCI: mediatek-gen3: Support mt8195 Tinghan Shen
2022-11-03 14:25 ` AngeloGioacchino Del Regno
2022-11-04 21:59 ` Rob Herring
2022-11-03 2:56 ` [PATCH v5 2/3] arm64: dts: mt8195: Add pcie and pcie phy nodes Tinghan Shen
2022-11-11 8:47 ` Matthias Brugger
2022-11-03 2:56 ` [PATCH v5 3/3] arm64: dts: mt8195: Add venc node Tinghan Shen
2022-11-08 18:39 ` Matthias Brugger [this message]
2022-11-10 15:18 ` (subset) [PATCH v5 0/3] Add driver nodes for MT8195 SoC Lorenzo Pieralisi
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=8e8bf059-7347-3586-0cc9-e02c007de9b2@gmail.com \
--to=matthias.bgg@gmail.com \
--cc=Project_Global_Chrome_Upstream_Group@mediatek.com \
--cc=bhelgaas@google.com \
--cc=devicetree@vger.kernel.org \
--cc=irui.wang@mediatek.com \
--cc=jianjun.wang@mediatek.com \
--cc=krzysztof.kozlowski+dt@linaro.org \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-mediatek@lists.infradead.org \
--cc=linux-pci@vger.kernel.org \
--cc=robh+dt@kernel.org \
--cc=ryder.lee@mediatek.com \
--cc=tinghan.shen@mediatek.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).