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Sun, 22 Jan 2023 06:09:16 -0800 (PST) Received: from [192.168.1.109] ([178.197.216.144]) by smtp.gmail.com with ESMTPSA id w10-20020a5d544a000000b00273cd321a1bsm2853845wrv.107.2023.01.22.06.09.14 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Sun, 22 Jan 2023 06:09:15 -0800 (PST) Message-ID: <938a5115-48e4-73f9-8a7a-ae890eb10077@linaro.org> Date: Sun, 22 Jan 2023 15:09:13 +0100 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.7.0 Subject: Re: [PATCH v4 01/12] dt-bindings: phy: Add QMP PCIe PHY comptible for SM8550 Content-Language: en-US To: Abel Vesa , Andy Gross , Bjorn Andersson , Konrad Dybcio , Lorenzo Pieralisi , Rob Herring , =?UTF-8?Q?Krzysztof_Wilczy=c5=84ski?= , Bjorn Helgaas , Krzysztof Kozlowski , Lorenzo Pieralisi , "vkoul@kernel.org" , Kishon Vijay Abraham I , Manivannan Sadhasivam Cc: linux-arm-msm@vger.kernel.org, linux-pci@vger.kernel.org, linux-phy@lists.infradead.org, devicetree@vger.kernel.org, Linux Kernel Mailing List References: <20230119140453.3942340-1-abel.vesa@linaro.org> <20230119140453.3942340-2-abel.vesa@linaro.org> From: Krzysztof Kozlowski In-Reply-To: <20230119140453.3942340-2-abel.vesa@linaro.org> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org On 19/01/2023 15:04, Abel Vesa wrote: > Document the QMP PCIe PHY compatible for SM8550. > > Signed-off-by: Abel Vesa > --- > > This patchset relies on the following patchset: > https://lore.kernel.org/all/20230117224148.1914627-1-abel.vesa@linaro.org/ > > The v3 of this patchset is: > https://lore.kernel.org/all/20230118005328.2378792-1-abel.vesa@linaro.org/ > > Changes since v3: > * increased the allowed number of resets to allow ncsr reset > * added vdda-qref-supply which is used by pcie1_phy node in MTP dts > * added both compatibles to the allOf:if:then clause to constrain the > number of possible clocks to 5 > > Changes since v2: > * added back the binding compatible update patch > > Changes since v1: > * split all the offsets into separate patches, like Vinod suggested > > .../bindings/phy/qcom,sc8280xp-qmp-pcie-phy.yaml | 11 ++++++++++- > 1 file changed, 10 insertions(+), 1 deletion(-) > > diff --git a/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-pcie-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-pcie-phy.yaml > index 8a85318d9c92..4b4566f90811 100644 > --- a/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-pcie-phy.yaml > +++ b/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-pcie-phy.yaml > @@ -20,6 +20,8 @@ properties: > - qcom,sc8280xp-qmp-gen3x2-pcie-phy > - qcom,sc8280xp-qmp-gen3x4-pcie-phy > - qcom,sm8350-qmp-gen3x1-pcie-phy > + - qcom,sm8550-qmp-gen3x2-pcie-phy > + - qcom,sm8550-qmp-gen4x2-pcie-phy > > reg: > minItems: 1 > @@ -43,16 +45,21 @@ properties: > maxItems: 1 > > resets: > - maxItems: 1 > + minItems: 1 > + maxItems: 2 > > reset-names: > + minItems: 1 > items: > - const: phy > + - const: nocsr I think it is valid only for this phy variant, so please constrain it to 1 entries for all others. Best regards, Krzysztof