From: Michael Walle <michael@walle.cc>
To: Bjorn Helgaas <helgaas@kernel.org>
Cc: Jesse Brandeburg <jesse.brandeburg@intel.com>,
Tony Nguyen <anthony.l.nguyen@intel.com>,
linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org,
intel-wired-lan@lists.osuosl.org,
Bjorn Helgaas <bhelgaas@google.com>,
Paul Menzel <pmenzel@molgen.mpg.de>
Subject: Re: [PATCH v2] PCI: Fix Intel i210 by avoiding overlapping of BARs
Date: Thu, 23 Dec 2021 19:12:02 +0100 [thread overview]
Message-ID: <9526698be0ced0f7a7ed00bd76538d16@walle.cc> (raw)
In-Reply-To: <20211223163754.GA1267351@bhelgaas>
Am 2021-12-23 17:37, schrieb Bjorn Helgaas:
> I intended to change the quirk from FINAL to EARLY, but obviously
> forgot. Here's the updated version:
>
> commit bb5639b73a2d ("PCI: Work around Intel I210 ROM BAR overlap
> defect")
> Author: Bjorn Helgaas <bhelgaas@google.com>
> Date: Tue Dec 21 10:45:07 2021 -0600
>
> PCI: Work around Intel I210 ROM BAR overlap defect
>
> Per PCIe r5, sec 7.5.1.2.4, a device must not claim accesses to its
> Expansion ROM unless both the Memory Space Enable and the Expansion
> ROM
> Enable bit are set. But apparently some Intel I210 NICs don't work
> correctly if the ROM BAR overlaps another BAR, even if the
> Expansion ROM is
> disabled.
>
> Michael reported that on a Kontron SMARC-sAL28 ARM64 system with
> U-Boot
> v2021.01-rc3, the ROM BAR overlaps BAR 3, and networking doesn't
> work at
> all:
>
> BAR 0: 0x40000000 (32-bit, non-prefetchable) [size=1M]
> BAR 3: 0x40200000 (32-bit, non-prefetchable) [size=16K]
> ROM: 0x40200000 (disabled) [size=1M]
>
> NETDEV WATCHDOG: enP2p1s0 (igb): transmit queue 0 timed out
> Hardware name: Kontron SMARC-sAL28 (Single PHY) on SMARC Eval
> 2.0 carrier (DT)
> igb 0002:01:00.0 enP2p1s0: Reset adapter
>
> Previously, pci_std_update_resource() wrote the assigned ROM
> address to the
> BAR only when the ROM was enabled. This meant that the I210 ROM
> BAR could
> be left with an address assigned by firmware, which might overlap
> with
> other BARs.
>
> Quirk these I210 devices so pci_std_update_resource() always writes
> the
> assigned address to the ROM BAR, whether or not the ROM is enabled.
>
> Link:
> https://lore.kernel.org/r/20201230185317.30915-1-michael@walle.cc
> Link: https://bugzilla.kernel.org/show_bug.cgi?id=211105
> Reported-by: Michael Walle <michael@walle.cc>
> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Tested-by: Michael Walle <michael@walle.cc>
Thanks,
-michael
next prev parent reply other threads:[~2021-12-23 18:12 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-12-30 18:53 [PATCH v2] PCI: Fix Intel i210 by avoiding overlapping of BARs Michael Walle
2021-01-08 21:20 ` Bjorn Helgaas
2021-01-09 18:31 ` Michael Walle
2021-01-12 22:58 ` Bjorn Helgaas
2021-01-12 23:32 ` Michael Walle
2021-01-15 23:57 ` Bjorn Helgaas
2021-01-17 19:27 ` Michael Walle
2021-02-01 19:49 ` Michael Walle
2021-02-01 22:20 ` Bjorn Helgaas
2021-03-15 21:51 ` Michael Walle
2021-08-20 15:12 ` Michael Walle
2021-12-20 17:43 ` Michael Walle
2021-12-21 17:48 ` Bjorn Helgaas
2021-12-23 9:27 ` Michael Walle
2021-12-23 16:37 ` Bjorn Helgaas
2021-12-23 18:12 ` Michael Walle [this message]
2022-01-12 14:50 ` Bjorn Helgaas
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