From: Gustavo Pimentel <Gustavo.Pimentel@synopsys.com> To: dmaengine@vger.kernel.org, linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, Vinod Koul <vkoul@kernel.org>, Dan Williams <dan.j.williams@intel.com>, Bjorn Helgaas <bhelgaas@google.com>, Gustavo Pimentel <Gustavo.Pimentel@synopsys.com> Subject: [PATCH v5 10/15] dmaengine: dw-edma: Change linked list and data blocks offset and sizes Date: Thu, 11 Feb 2021 10:12:43 +0100 [thread overview] Message-ID: <9e60326f906093f1110bcde6286b8f743c8f19f9.1613034728.git.gustavo.pimentel@synopsys.com> (raw) In-Reply-To: <cover.1613034728.git.gustavo.pimentel@synopsys.com> In-Reply-To: <cover.1613034728.git.gustavo.pimentel@synopsys.com> Changes the linked list and data blocks offset and sizes to follow the recommendation given by the hardware team for the IPK solution. Although the previous data blocks offset and sizes are still valid and functional, using them that might present some issues related to the IPK solution, since this solution is based on FPGA and might be subjected to timmings constrains. Signed-off-by: Gustavo Pimentel <gustavo.pimentel@synopsys.com> --- drivers/dma/dw-edma/dw-edma-pcie.c | 32 ++++++++++++++++---------------- 1 file changed, 16 insertions(+), 16 deletions(-) diff --git a/drivers/dma/dw-edma/dw-edma-pcie.c b/drivers/dma/dw-edma/dw-edma-pcie.c index a0fa809..686b4ff 100644 --- a/drivers/dma/dw-edma/dw-edma-pcie.c +++ b/drivers/dma/dw-edma/dw-edma-pcie.c @@ -59,29 +59,29 @@ static const struct dw_edma_pcie_data snps_edda_data = { .rg.sz = 0x00002000, /* 8 Kbytes */ /* eDMA memory linked list location */ .ll_wr = { - /* Channel 0 - BAR 2, offset 0 Mbytes, size 2 Mbytes */ - DW_BLOCK(BAR_2, 0x00000000, 0x00200000) - /* Channel 1 - BAR 2, offset 2 Mbytes, size 2 Mbytes */ - DW_BLOCK(BAR_2, 0x00200000, 0x00200000) + /* Channel 0 - BAR 2, offset 0 Mbytes, size 2 Kbytes */ + DW_BLOCK(BAR_2, 0x00000000, 0x00000800) + /* Channel 1 - BAR 2, offset 2 Mbytes, size 2 Kbytes */ + DW_BLOCK(BAR_2, 0x00200000, 0x00000800) }, .ll_rd = { - /* Channel 0 - BAR 2, offset 4 Mbytes, size 2 Mbytes */ - DW_BLOCK(BAR_2, 0x00400000, 0x00200000) - /* Channel 1 - BAR 2, offset 6 Mbytes, size 2 Mbytes */ - DW_BLOCK(BAR_2, 0x00600000, 0x00200000) + /* Channel 0 - BAR 2, offset 4 Mbytes, size 2 Kbytes */ + DW_BLOCK(BAR_2, 0x00400000, 0x00000800) + /* Channel 1 - BAR 2, offset 6 Mbytes, size 2 Kbytes */ + DW_BLOCK(BAR_2, 0x00600000, 0x00000800) }, /* eDMA memory data location */ .dt_wr = { - /* Channel 0 - BAR 2, offset 8 Mbytes, size 14 Mbytes */ - DW_BLOCK(BAR_2, 0x00800000, 0x00e00000) - /* Channel 1 - BAR 2, offset 22 Mbytes, size 14 Mbytes */ - DW_BLOCK(BAR_2, 0x01600000, 0x00e00000) + /* Channel 0 - BAR 2, offset 8 Mbytes, size 2 Kbytes */ + DW_BLOCK(BAR_2, 0x00800000, 0x00000800) + /* Channel 1 - BAR 2, offset 9 Mbytes, size 2 Kbytes */ + DW_BLOCK(BAR_2, 0x00900000, 0x00000800) }, .dt_rd = { - /* Channel 0 - BAR 2, offset 36 Mbytes, size 14 Mbytes */ - DW_BLOCK(BAR_2, 0x02400000, 0x00e00000) - /* Channel 1 - BAR 2, offset 50 Mbytes, size 14 Mbytes */ - DW_BLOCK(BAR_2, 0x03200000, 0x00e00000) + /* Channel 0 - BAR 2, offset 10 Mbytes, size 2 Kbytes */ + DW_BLOCK(BAR_2, 0x00a00000, 0x00000800) + /* Channel 1 - BAR 2, offset 11 Mbytes, size 2 Kbytes */ + DW_BLOCK(BAR_2, 0x00b00000, 0x00000800) }, /* Other */ .mf = EDMA_MF_EDMA_UNROLL, -- 2.7.4
next prev parent reply other threads:[~2021-02-11 9:18 UTC|newest] Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top 2021-02-11 9:12 [PATCH v5 00/15] dmaengine: dw-edma: HDMA support Gustavo Pimentel 2021-02-11 9:12 ` [PATCH v5 01/15] dmaengine: dw-edma: Add writeq() and readq() for 64 bits architectures Gustavo Pimentel 2021-02-11 9:12 ` [PATCH v5 02/15] dmaengine: dw-edma: Fix comments offset characters' alignment Gustavo Pimentel 2021-02-11 9:12 ` [PATCH v5 03/15] dmaengine: dw-edma: Add support for the HDMA feature Gustavo Pimentel 2021-02-11 9:12 ` [PATCH v5 04/15] PCI: Add pci_find_vsec_capability() to find a specific VSEC Gustavo Pimentel 2021-02-11 12:50 ` Krzysztof Wilczyński 2021-02-11 19:42 ` Gustavo Pimentel 2021-02-11 9:12 ` [PATCH v5 05/15] dmaengine: dw-edma: Add PCIe VSEC data retrieval support Gustavo Pimentel 2021-02-11 12:59 ` Krzysztof Wilczyński 2021-02-11 13:48 ` Gustavo Pimentel 2021-02-11 9:12 ` [PATCH v5 06/15] dmaengine: dw-edma: Add device_prep_interleave_dma() support Gustavo Pimentel 2021-02-11 9:12 ` [PATCH v5 07/15] dmaengine: dw-edma: Improve number of channels check Gustavo Pimentel 2021-02-11 9:12 ` [PATCH v5 08/15] dmaengine: dw-edma: Reorder variables to keep consistency Gustavo Pimentel 2021-02-11 9:12 ` [PATCH v5 09/15] dmaengine: dw-edma: Improve the linked list and data blocks definition Gustavo Pimentel 2021-02-11 13:08 ` Krzysztof Wilczyński 2021-02-11 9:12 ` Gustavo Pimentel [this message] 2021-02-11 9:12 ` [PATCH v5 11/15] dmaengine: dw-edma: Move struct dentry variable from static definition into dw_edma struct Gustavo Pimentel 2021-02-11 9:12 ` [PATCH v5 12/15] dmaengine: dw-edma: Fix crash on loading/unloading driver Gustavo Pimentel 2021-02-11 9:12 ` [PATCH v5 13/15] dmaengine: dw-edma: Change DMA abreviation from lower into upper case Gustavo Pimentel 2021-02-11 9:12 ` [PATCH v5 14/15] dmaengine: dw-edma: Revert fix scatter-gather address calculation Gustavo Pimentel 2021-02-11 13:09 ` Krzysztof Wilczyński 2021-02-11 9:12 ` [PATCH v5 15/15] dmaengine: dw-edma: Add pcim_iomap_table return check Gustavo Pimentel 2021-02-11 13:14 ` Krzysztof Wilczyński
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