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b=iDuXoWV3cwqd4UQl5lqekWUmkeSWsa59JgZuOnW2fdPIAfYZRlAtKixMRRiJrZ4enu9LwhBmmEQIOKwN6/eKV6oTxro7tpWJoJTiO0XBAME55NXkhW0RsLuLGzxv78jzWWXNP61ngEG7h1ntBlSFB++UWzCxnwd9kcHTZibeMnI= Received: from AS8PR04MB8676.eurprd04.prod.outlook.com (2603:10a6:20b:42b::10) by VI1PR04MB4016.eurprd04.prod.outlook.com (2603:10a6:803:4a::27) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.4888.10; Fri, 14 Jan 2022 02:03:03 +0000 Received: from AS8PR04MB8676.eurprd04.prod.outlook.com ([fe80::949e:59fd:6098:6508]) by AS8PR04MB8676.eurprd04.prod.outlook.com ([fe80::949e:59fd:6098:6508%4]) with mapi id 15.20.4888.012; Fri, 14 Jan 2022 02:03:03 +0000 From: Hongxing Zhu To: Marcel Ziswiler , "kishon@ti.com" , "vkoul@kernel.org" , "lorenzo.pieralisi@arm.com" , "l.stach@pengutronix.de" , "tharvey@gateworks.com" , "robh@kernel.org" , "galak@kernel.crashing.org" , "bhelgaas@google.com" , "shawnguo@kernel.org" CC: "linux-phy@lists.infradead.org" , "linux-pci@vger.kernel.org" , "kernel@pengutronix.de" , "devicetree@vger.kernel.org" , "linux-kernel@vger.kernel.org" , dl-linux-imx , "linux-arm-kernel@lists.infradead.org" Subject: RE: [PATCH v7 0/8] Add the imx8m pcie phy driver and imx8mm pcie support Thread-Topic: [PATCH v7 0/8] Add the imx8m pcie phy driver and imx8mm pcie support Thread-Index: AQHX51bVkIoDiCpdp0CHxa+OOhw1w6xg2nSAgAElzfA= Date: Fri, 14 Jan 2022 02:03:03 +0000 Message-ID: References: <1638432158-4119-1-git-send-email-hongxing.zhu@nxp.com> <8c11bbded57df020ba0897f7ad0295d60c9ee2cb.camel@toradex.com> In-Reply-To: <8c11bbded57df020ba0897f7ad0295d60c9ee2cb.camel@toradex.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: authentication-results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=nxp.com; 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charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: AS8PR04MB8676.eurprd04.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: 54189295-96d2-4036-5164-08d9d701ff95 X-MS-Exchange-CrossTenant-originalarrivaltime: 14 Jan 2022 02:03:03.1613 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: Dqo+eMwdR5BOD3PP5bXwTrZ4s3b8sL0gM1Ydb2h+1CcdJliDXHM4pfGki+3ItR0VOedxNL5x61BvPIvMqHFaKw== X-MS-Exchange-Transport-CrossTenantHeadersStamped: VI1PR04MB4016 Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org > -----Original Message----- > From: Marcel Ziswiler > Sent: Thursday, January 13, 2022 4:07 PM > To: kishon@ti.com; vkoul@kernel.org; lorenzo.pieralisi@arm.com; > l.stach@pengutronix.de; tharvey@gateworks.com; robh@kernel.org; > galak@kernel.crashing.org; Hongxing Zhu ; > bhelgaas@google.com; shawnguo@kernel.org > Cc: linux-phy@lists.infradead.org; linux-pci@vger.kernel.org; > kernel@pengutronix.de; devicetree@vger.kernel.org; > linux-kernel@vger.kernel.org; dl-linux-imx ; > linux-arm-kernel@lists.infradead.org > Subject: Re: [PATCH v7 0/8] Add the imx8m pcie phy driver and imx8mm > pcie support >=20 > Hi Richard >=20 > On Thu, 2021-12-02 at 16:02 +0800, Richard Zhu wrote: > > Refer to the discussion [1] when try to enable i.MX8MM PCIe support, > > one standalone PCIe PHY driver should be seperated from i.MX PCIe > > driver when enable i.MX8MM PCIe support. > > > > This patch-set adds the standalone PCIe PHY driver suport[1-5], and > > i.MX8MM PCIe support[6-8] to have whole view to review this > patch-set. > > > > The PCIe works on i.MX8MM EVK board based the the blkctrl power > driver > > [2] and this patch-set. And tested by Tim and Marcel on the different > > reference clock modes boards. > > > > [1] > > > https://eur01.safelinks.protection.outlook.com/?url=3Dhttps%3A%2F%2Fpa > tc > > > hwork.ozlabs.org%2Fproject%2Flinux-pci%2Fpatch%2F20210510141509. > 929120 > > > -3-l.stach%40pengutronix.de%2F&data=3D04%7C01%7Chongxing.zhu > %40nxp.c > > > om%7C487b28aecfd14bdfe1b808d9d66bb4ce%7C686ea1d3bc2b4c6fa92 > cd99c5c3016 > > > 35%7C0%7C0%7C637776580350900040%7CUnknown%7CTWFpbGZsb3d > 8eyJWIjoiMC4wLj > > > AwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C3000& > amp;sdata=3D > > > 8pMSNCoRVpWBld2dSGUUw2Dpq%2FlRAqsVWLqAJ0njEgo%3D&re > served=3D0 > > [2] > > > https://eur01.safelinks.protection.outlook.com/?url=3Dhttps%3A%2F%2Fpa > tc > > > hwork.kernel.org%2Fproject%2Flinux-arm-kernel%2Fcover%2F20210910 > 202640 > > .980366-1-l.stach%40pengutronix.de%2F&data=3D04%7C01%7Chon > gxing.zhu% > > > 40nxp.com%7C487b28aecfd14bdfe1b808d9d66bb4ce%7C686ea1d3bc2b > 4c6fa92cd99 > > > c5c301635%7C0%7C0%7C637776580350900040%7CUnknown%7CTWFp > bGZsb3d8eyJWIjo > > > iMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D% > 7C3000& > > ;sdata=3DMHPLXbIyL2pnZK%2FdVkDcJBJBjlqtPIOzzwLsNEKlCqs%3D& > ;reserved=3D0 > > > > Main changes v6 --> v7: > > - Add "Reviewed-by: Rob Herring " into #2 patches. > > - Regarding Vinod's review comments do the following changes. > > =A0 - Don't build in the PHY driver in default. > > =A0 - Remove the extra blank line > > =A0 - Correct the license tag. > > > > Main changes v5 --> v6: > > - Add "Reviewed-by: Rob Herring " into #1 and #3 > patches. > > - Merge Rob's review comments to the #2 patch. > > > > Main changes v4 --> v5: > > - Set the AUX_EN always 1b'1, thus it can fix the regression > > introduced in v4 > > =A0 series on Marcel's board. > > - Use the lower-case letter in the devicetreee refer to Marcel's > comments. > > - Since the default value of the deemphasis parameters are zero, only > > set > > =A0 the deemphasis registers when the input paramters are none zero. > > > > Main changes v3 --> v4: > > - Update the yaml to fix syntax error, add maxitems and drop > > description of phy > > - Correct the clock name in PHY DT node. > > - Squash the EVK board relalted dts changes into one patch, and drop > > the > > =A0 useless dummy clock and gpio suffix in DT nodes. > > - Add board specific de-emphasis parameters as DT properties. Thus > > each board > > =A0 can specify its actual de-emphasis values. > > - Update the commit log of PHY driver. > > - Remove the useless codes from PCIe driver, since they are moved to > > PHY driver > > - After the discussion and verification of the CLKREQ# configurations > > with Tim, > > =A0 agree to add an optional boolean property "fsl,clkreq-unsupported", > > indicates > > =A0 the CLKREQ# signal is hooked or not in HW designs. > > - Add "Tested-by: Marcel Ziswiler " tag, > > since > > =A0 Marcel help to test the v3 patch-set. > > > > Main changes v2 --> v3: > > - Regarding Lucas' comments. > > =A0- to have a whole view to review the patches, send out the i.MX8MM > PCIe support too. > > =A0- move the PHY related bits manipulations of the GPR/SRC to > standalone PHY driver. > > =A0- split the dts changes to SOC and board DT, and use the enum > instead of raw value. > > =A0- update the license of the dt-binding header file. > > > > Changes v1 --> v2: > > - Update the license of the dt-binding header file to make the license > > =A0 compatible with dts files. > > - Fix the dt_binding_check errors. > > > > > Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml=A0=A0=A0 |=A0= =A0 6 > +++ > > Documentation/devicetree/bindings/phy/fsl,imx8-pcie-phy.yaml |=A0 92 > > +++++++++++++++++++++++++++++++ > > > arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi > |=A0 55 > > +++++++++++++++++++ > arch/arm64/boot/dts/freescale/imx8mm.dtsi >=20 > > |=A0 46 +++++++++++++++- > drivers/pci/controller/dwc/pci-imx6.c > > |=A0 83 +++++++++++++++++++++++++--- > drivers/phy/freescale/Kconfig >=20 > > |=A0=A0 8 +++ > drivers/phy/freescale/Makefile >=20 > > |=A0=A0 1 + > drivers/phy/freescale/phy-fsl-imx8m-pcie.c=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0= =A0=A0=A0=A0=A0=A0=A0=A0 | > > 236 > > > +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ > +++++++++++++++++++++ > > > include/dt-bindings/phy/phy-imx8-pcie.h > |=A0 14 > > +++++ > > 9 files changed, 532 insertions(+), 9 deletions(-) > > > > [PATCH v7 1/8] dt-bindings: phy: phy-imx8-pcie: Add binding for the > > [PATCH v7 2/8] dt-bindings: phy: Add imx8 pcie phy driver support > > [PATCH v7 3/8] dt-bindings: imx6q-pcie: Add PHY phandles and name > > [PATCH v7 4/8] arm64: dts: imx8mm: Add the pcie phy support [PATCH > v7 > > 5/8] phy: freescale: pcie: Initialize the imx8 pcie [PATCH v7 6/8] > > arm64: dts: imx8mm: Add the pcie support [PATCH v7 7/8] arm64: dts: > > imx8mm-evk: Add the pcie support on imx8mm [PATCH v7 8/8] PCI: > imx: > > Add the imx8mm pcie support >=20 > What is the status of patches 4, 6 and 7? While the rest has been pulled > those are still missing in today's - next. [Richard Zhu] Thanks for your care. I used to ping Shawn twice on Dec17/27 2021, but couldn't receive his respo= nse. Anyway, I would continue to ping him later. Best Regards Richard Zhu >=20 > Cheers >=20 > Marcel