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[209.85.222.178]) by smtp.gmail.com with ESMTPSA id 7sm1789900qtx.33.2021.06.24.06.53.11 for (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 24 Jun 2021 06:53:11 -0700 (PDT) Received: by mail-qk1-f178.google.com with SMTP id c23so14592613qkc.10 for ; Thu, 24 Jun 2021 06:53:11 -0700 (PDT) X-Received: by 2002:a25:8082:: with SMTP id n2mr5091144ybk.79.1624542421816; Thu, 24 Jun 2021 06:47:01 -0700 (PDT) MIME-Version: 1.0 References: <20210621235248.2521620-1-dianders@chromium.org> <20210621165230.3.I7accc008905590bb2b46f40f91a4aeda5b378007@changeid> In-Reply-To: From: Doug Anderson Date: Thu, 24 Jun 2021 06:46:50 -0700 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH 3/6] PCI: Indicate that we want to force strict DMA for untrusted devices To: Greg KH Cc: "Rafael J. Wysocki" , "Rafael J. Wysocki" , Will Deacon , Robin Murphy , Joerg Roedel , Bjorn Andersson , Ulf Hansson , Adrian Hunter , Bjorn Helgaas , Rob Clark , linux-arm-msm , linux-pci@vger.kernel.org, quic_c_gdjako@quicinc.com, "list@263.net:IOMMU DRIVERS , Joerg Roedel ," , Sonny Rao , Sai Prakash Ranjan , Linux MMC List , Veerabhadrarao Badiganti , Rajat Jain , Saravana Kannan , Joel Fernandes , LKML Content-Type: text/plain; charset="UTF-8" Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org Hi, On Thu, Jun 24, 2021 at 6:38 AM Greg KH wrote: > > On Mon, Jun 21, 2021 at 04:52:45PM -0700, Douglas Anderson wrote: > > At the moment the generic IOMMU framework reaches into the PCIe device > > to check the "untrusted" state and uses this information to figure out > > if it should be running the IOMMU in strict or non-strict mode. Let's > > instead set the new boolean in "struct device" to indicate when we > > want forced strictness. > > > > NOTE: we still continue to set the "untrusted" bit in PCIe since that > > apparently is used for more than just IOMMU strictness. It probably > > makes sense for a later patchset to clarify all of the other needs we > > have for "untrusted" PCIe devices (perhaps add more booleans into the > > "struct device") so we can fully eliminate the need for the IOMMU > > framework to reach into a PCIe device. > > It feels like the iommu code should not be messing with pci devices at > all, please don't do this. I think it's generally agreed that having the IOMMU code reach into the PCIe code is pretty non-ideal, but that's not something that my patch series added. The IOMMU code already has special cases to reach into PCIe devices to decide strictness. I was actually trying to reduce the amount of it. > Why does this matter? Why wouldn't a pci device use "strict" iommu at > all times? What happens if it does not? Why are PCI devices special? This is something pre-existing in Linux. In my patch series I was trying to make PCI devices less special and take some of the concepts from there and expand them, but in a cleaner way. It sounds like in my v2 I should steer away from this and leave the existing PCI hacks alone. -Doug