From: Yinghai Lu <yinghai@kernel.org>
To: Bjorn Helgaas <bhelgaas@google.com>
Cc: linux-pci@vger.kernel.org,
Daniel Yeisley <dan.yeisley@unisys.com>,
linux-kernel@vger.kernel.org,
"David S. Miller" <davem@davemloft.net>
Subject: Re: [PATCH 1/3] PCI: allow P2P bridge windows starting at PCI bus address zero
Date: Mon, 9 Jul 2012 14:11:35 -0700 [thread overview]
Message-ID: <CAE9FiQW-6x_HrZQLmfw22Temvma7rd12qR3QfKj-Eh1tqWHHNQ@mail.gmail.com> (raw)
In-Reply-To: <20120709203203.28178.15800.stgit@bhelgaas.mtv.corp.google.com>
On Mon, Jul 9, 2012 at 1:32 PM, Bjorn Helgaas <bhelgaas@google.com> wrote:
> cd81e1ea1a4c added checks that prevent us from using P2P bridge windows
> that start at PCI bus address zero. The reason was to "prevent us from
> overwriting resources that are unassigned."
>
> But generic code should allow address zero in both BARs and bridge
> windows, so I think that commit was a mistake.
>
> Windows at bus address zero are legal and likely to exist on machines with
> an offset between bus addresses and CPU addresses. For example, in the
> following hypothetical scenario, the bridge at 00:01.0 has a window at bus
> address zero and the device at 01:00.0 has a BAR at bus address zero, and
> I think both are perfectly valid:
>
> PCI host bridge to bus 0000:00
> pci_bus 0000:00: root bus resource [mem 0x100000000-0x1ffffffff] (bus address [0x00000000-0xffffffff])
> pci 0000:00:01.0: PCI bridge to [bus 01]
> pci 0000:00:01.0: bridge window [mem 0x100000000-0x100ffffff]
> pci 0000:01:00.0: reg 10: [mem 0x100000000-0x100ffffff]
>
> CC: Yinghai Lu <yinghai@kernel.org>
> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Yinghai Lu <yinghai@kernel.org>
next prev parent reply other threads:[~2012-07-09 21:11 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-07-09 20:31 [PATCH 0/3] PCI: P2P bridge window fixes Bjorn Helgaas
2012-07-09 20:32 ` [PATCH 1/3] PCI: allow P2P bridge windows starting at PCI bus address zero Bjorn Helgaas
2012-07-09 21:11 ` Yinghai Lu [this message]
2012-07-09 20:32 ` [PATCH 2/3] PCI: reimplement P2P bridge 1K I/O windows (Intel P64H2) Bjorn Helgaas
2012-07-09 21:43 ` Yinghai Lu
2012-07-09 22:21 ` Bjorn Helgaas
2012-07-09 23:50 ` Yinghai Lu
2012-07-09 20:32 ` [PATCH 3/3] sparc/PCI: replace pci_cfg_fake_ranges() with pci_read_bridge_bases() Bjorn Helgaas
2012-07-09 21:25 ` David Miller
2012-07-10 3:24 ` [PATCH 0/3] PCI: P2P bridge window fixes Bjorn Helgaas
2012-07-10 15:08 ` Bjorn Helgaas
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