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* Mobiveil legacy IRQ binding erroneous interrupt-map
@ 2019-10-16 10:31 Lorenzo Pieralisi
  2019-10-29 11:38 ` Z.q. Hou
  0 siblings, 1 reply; 3+ messages in thread
From: Lorenzo Pieralisi @ 2019-10-16 10:31 UTC (permalink / raw)
  To: Hou Zhiqiang, Karthikeyan Mitran; +Cc: linux-pci

Hi Hou, Karthikeyan,

I have just noticed the mobiveil interrupt-map DT bindings example
is wrong:

This:

interrupt-map = <0 0 0 0 &pci_express 0>,
		<0 0 0 1 &pci_express 1>,
		<0 0 0 2 &pci_express 2>,
		<0 0 0 3 &pci_express 3>;

should be:

interrupt-map = <0 0 0 1 &pci_express 0>,
		<0 0 0 2 &pci_express 1>,
		<0 0 0 3 &pci_express 2>,
		<0 0 0 4 &pci_express 3>;

Legacy IRQs Interrupt pins map this way:

{{1, INTA}, {2, INTB}, {3,INTC}, {4,INTD}}

(as read from Interrupt pin register in the config space header) (ie
refer to PCI local bus specification 3.0), please fix it as soon as
possible.

Lorenzo

^ permalink raw reply	[flat|nested] 3+ messages in thread

* RE: Mobiveil legacy IRQ binding erroneous interrupt-map
  2019-10-16 10:31 Mobiveil legacy IRQ binding erroneous interrupt-map Lorenzo Pieralisi
@ 2019-10-29 11:38 ` Z.q. Hou
  2019-10-29 11:50   ` Karthikeyan Mitran
  0 siblings, 1 reply; 3+ messages in thread
From: Z.q. Hou @ 2019-10-29 11:38 UTC (permalink / raw)
  To: Lorenzo Pieralisi, Karthikeyan Mitran; +Cc: linux-pci

Hi Lorenzo,

The Mobiveil INTx controller is not used on NXP's platform, so I cannot verify this feature. 

Karthikeyan, please have a look on this issue.

Thanks,
Zhiqiang

> -----Original Message-----
> From: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
> Sent: 2019年10月16日 18:32
> To: Z.q. Hou <zhiqiang.hou@nxp.com>; Karthikeyan Mitran
> <m.karthikeyan@mobiveil.co.in>
> Cc: linux-pci@vger.kernel.org
> Subject: Mobiveil legacy IRQ binding erroneous interrupt-map
> 
> Hi Hou, Karthikeyan,
> 
> I have just noticed the mobiveil interrupt-map DT bindings example is wrong:
> 
> This:
> 
> interrupt-map = <0 0 0 0 &pci_express 0>,
> 		<0 0 0 1 &pci_express 1>,
> 		<0 0 0 2 &pci_express 2>,
> 		<0 0 0 3 &pci_express 3>;
> 
> should be:
> 
> interrupt-map = <0 0 0 1 &pci_express 0>,
> 		<0 0 0 2 &pci_express 1>,
> 		<0 0 0 3 &pci_express 2>,
> 		<0 0 0 4 &pci_express 3>;
> 
> Legacy IRQs Interrupt pins map this way:
> 
> {{1, INTA}, {2, INTB}, {3,INTC}, {4,INTD}}
> 
> (as read from Interrupt pin register in the config space header) (ie refer to
> PCI local bus specification 3.0), please fix it as soon as possible.
> 
> Lorenzo

^ permalink raw reply	[flat|nested] 3+ messages in thread

* Re: Mobiveil legacy IRQ binding erroneous interrupt-map
  2019-10-29 11:38 ` Z.q. Hou
@ 2019-10-29 11:50   ` Karthikeyan Mitran
  0 siblings, 0 replies; 3+ messages in thread
From: Karthikeyan Mitran @ 2019-10-29 11:50 UTC (permalink / raw)
  To: Z.q. Hou; +Cc: Lorenzo Pieralisi, linux-pci

Hi  Lorenzo, Zhiqiang,
        Thanks, will check and fix.

On Tue, Oct 29, 2019 at 5:08 PM Z.q. Hou <zhiqiang.hou@nxp.com> wrote:
>
> Hi Lorenzo,
>
> The Mobiveil INTx controller is not used on NXP's platform, so I cannot verify this feature.
>
> Karthikeyan, please have a look on this issue.
>
> Thanks,
> Zhiqiang
>
> > -----Original Message-----
> > From: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
> > Sent: 2019年10月16日 18:32
> > To: Z.q. Hou <zhiqiang.hou@nxp.com>; Karthikeyan Mitran
> > <m.karthikeyan@mobiveil.co.in>
> > Cc: linux-pci@vger.kernel.org
> > Subject: Mobiveil legacy IRQ binding erroneous interrupt-map
> >
> > Hi Hou, Karthikeyan,
> >
> > I have just noticed the mobiveil interrupt-map DT bindings example is wrong:
> >
> > This:
> >
> > interrupt-map = <0 0 0 0 &pci_express 0>,
> >               <0 0 0 1 &pci_express 1>,
> >               <0 0 0 2 &pci_express 2>,
> >               <0 0 0 3 &pci_express 3>;
> >
> > should be:
> >
> > interrupt-map = <0 0 0 1 &pci_express 0>,
> >               <0 0 0 2 &pci_express 1>,
> >               <0 0 0 3 &pci_express 2>,
> >               <0 0 0 4 &pci_express 3>;
> >
> > Legacy IRQs Interrupt pins map this way:
> >
> > {{1, INTA}, {2, INTB}, {3,INTC}, {4,INTD}}
> >
> > (as read from Interrupt pin register in the config space header) (ie refer to
> > PCI local bus specification 3.0), please fix it as soon as possible.
> >
> > Lorenzo



-- 
Thanks,
Regards,
Karthikeyan Mitran

-- 
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^ permalink raw reply	[flat|nested] 3+ messages in thread

end of thread, other threads:[~2019-10-29 11:50 UTC | newest]

Thread overview: 3+ messages (download: mbox.gz / follow: Atom feed)
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2019-10-16 10:31 Mobiveil legacy IRQ binding erroneous interrupt-map Lorenzo Pieralisi
2019-10-29 11:38 ` Z.q. Hou
2019-10-29 11:50   ` Karthikeyan Mitran

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