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From: sundeep subbaraya <sundeep.lkml@gmail.com>
To: Bjorn Helgaas <helgaas@kernel.org>,
	linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org,
	"Stalley, Sean" <sean.stalley@intel.com>,
	Bjorn Helgaas <bhelgaas@google.com>
Cc: sgoutham@marvell.com, Subbaraya Sundeep <sbhatta@marvell.com>
Subject: Re: [PATCH] PCI: Do not use bus number zero from EA capability
Date: Mon, 23 Sep 2019 12:30:56 +0530	[thread overview]
Message-ID: <CALHRZurHCLY-F0b--jk3QvHmHAGEDH0oaVEszigJz-s5MSW94A@mail.gmail.com> (raw)
In-Reply-To: <1567438203-8405-1-git-send-email-sundeep.lkml@gmail.com>

Hi Bjorn,

Please let me know if you have any comments on the patch.

Thanks,
Sundeep

On Mon, Sep 2, 2019 at 9:00 PM <sundeep.lkml@gmail.com> wrote:
>
> From: Subbaraya Sundeep <sbhatta@marvell.com>
>
> As per the spec, "Enhanced Allocation (EA) for Memory
> and I/O Resources" ECN, approved 23 October 2014,
> sec 6.9.1.2, fixed bus numbers of a bridge can be zero
> when no function that uses EA is located behind it.
> Hence assign bus numbers sequentially when fixed bus
> numbers are zero.
>
> Fixes: 2dbce590117981196fe355efc0569bc6f949ae9b
>
> Signed-off-by: Subbaraya Sundeep <sbhatta@marvell.com>
> ---
>  drivers/pci/probe.c | 25 +++++++++++++------------
>  1 file changed, 13 insertions(+), 12 deletions(-)
>
> diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c
> index a3c7338..c06ca4c 100644
> --- a/drivers/pci/probe.c
> +++ b/drivers/pci/probe.c
> @@ -1095,27 +1095,28 @@ static unsigned int pci_scan_child_bus_extend(struct pci_bus *bus,
>   * @sub: updated with subordinate bus number from EA
>   *
>   * If @dev is a bridge with EA capability, update @sec and @sub with
> - * fixed bus numbers from the capability and return true.  Otherwise,
> - * return false.
> + * fixed bus numbers from the capability. Otherwise @sec and @sub
> + * will be zeroed.
>   */
> -static bool pci_ea_fixed_busnrs(struct pci_dev *dev, u8 *sec, u8 *sub)
> +static void pci_ea_fixed_busnrs(struct pci_dev *dev, u8 *sec, u8 *sub)
>  {
>         int ea, offset;
>         u32 dw;
>
> +       *sec = *sub = 0;
> +
>         if (dev->hdr_type != PCI_HEADER_TYPE_BRIDGE)
> -               return false;
> +               return;
>
>         /* find PCI EA capability in list */
>         ea = pci_find_capability(dev, PCI_CAP_ID_EA);
>         if (!ea)
> -               return false;
> +               return;
>
>         offset = ea + PCI_EA_FIRST_ENT;
>         pci_read_config_dword(dev, offset, &dw);
>         *sec =  dw & PCI_EA_SEC_BUS_MASK;
>         *sub = (dw & PCI_EA_SUB_BUS_MASK) >> PCI_EA_SUB_BUS_SHIFT;
> -       return true;
>  }
>
>  /*
> @@ -1151,7 +1152,6 @@ static int pci_scan_bridge_extend(struct pci_bus *bus, struct pci_dev *dev,
>         u16 bctl;
>         u8 primary, secondary, subordinate;
>         int broken = 0;
> -       bool fixed_buses;
>         u8 fixed_sec, fixed_sub;
>         int next_busnr;
>
> @@ -1254,11 +1254,12 @@ static int pci_scan_bridge_extend(struct pci_bus *bus, struct pci_dev *dev,
>                 pci_write_config_word(dev, PCI_STATUS, 0xffff);
>
>                 /* Read bus numbers from EA Capability (if present) */
> -               fixed_buses = pci_ea_fixed_busnrs(dev, &fixed_sec, &fixed_sub);
> -               if (fixed_buses)
> +               pci_ea_fixed_busnrs(dev, &fixed_sec, &fixed_sub);
> +
> +               next_busnr = max + 1;
> +               /* Use secondary bus number in EA */
> +               if (fixed_sec)
>                         next_busnr = fixed_sec;
> -               else
> -                       next_busnr = max + 1;
>
>                 /*
>                  * Prevent assigning a bus number that already exists.
> @@ -1336,7 +1337,7 @@ static int pci_scan_bridge_extend(struct pci_bus *bus, struct pci_dev *dev,
>                  * If fixed subordinate bus number exists from EA
>                  * capability then use it.
>                  */
> -               if (fixed_buses)
> +               if (fixed_sub)
>                         max = fixed_sub;
>                 pci_bus_update_busn_res_end(child, max);
>                 pci_write_config_byte(dev, PCI_SUBORDINATE_BUS, max);
> --
> 2.7.4
>

  reply	other threads:[~2019-09-23  7:01 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-09-02 15:30 [PATCH] PCI: Do not use bus number zero from EA capability sundeep.lkml
2019-09-23  7:00 ` sundeep subbaraya [this message]
2019-09-23 12:35 ` Andrew Murray
2019-09-24  9:56   ` sundeep subbaraya

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