From: Rob Herring <robh+dt@kernel.org>
To: Sivaprakash Murugesan <sivaprak@qti.qualcomm.com>
Cc: Andy Gross <agross@kernel.org>,
Bjorn Andersson <bjorn.andersson@linaro.org>,
Bjorn Helgaas <bhelgaas@google.com>,
Sivaprakash Murugesan <sivaprak@codeaurora.org>,
linux-arm-msm <linux-arm-msm@vger.kernel.org>,
PCI <linux-pci@vger.kernel.org>,
devicetree@vger.kernel.org,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH V2] dt-bindings: pci: convert QCOM pci bindings to YAML
Date: Tue, 28 Jul 2020 09:27:01 -0600 [thread overview]
Message-ID: <CAL_Jsq+-rwG73mEkYmMQcnxHoBpbFMWHKDvzUK=6-fMAo77-9w@mail.gmail.com> (raw)
In-Reply-To: <1595776013-12877-1-git-send-email-sivaprak@qti.qualcomm.com>
On Sun, Jul 26, 2020 at 9:07 AM Sivaprakash Murugesan
<sivaprak@qti.qualcomm.com> wrote:
>
> From: Sivaprakash Murugesan <sivaprak@codeaurora.org>
>
> Convert QCOM pci bindings to YAML schema
>
> Signed-off-by: Sivaprakash Murugesan <sivaprak@codeaurora.org>
> ---
> [v2]
> - Referenced pci-bus.yaml
> - removed duplicate properties already referenced by pci-bus.yaml
> - Addressed comments from Rob
> .../devicetree/bindings/pci/qcom,pcie.txt | 330 ---------------
> .../devicetree/bindings/pci/qcom,pcie.yaml | 447 +++++++++++++++++++++
> 2 files changed, 447 insertions(+), 330 deletions(-)
> delete mode 100644 Documentation/devicetree/bindings/pci/qcom,pcie.txt
> create mode 100644 Documentation/devicetree/bindings/pci/qcom,pcie.yaml
> diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml
> new file mode 100644
> index 000000000000..ddb84f49ac1c
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml
> @@ -0,0 +1,447 @@
> +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
> +
> +%YAML 1.2
> +---
> +$id: "http://devicetree.org/schemas/pci/qcom,pcie.yaml#"
> +$schema: "http://devicetree.org/meta-schemas/core.yaml#"
> +
> +title: Qualcomm PCI express root complex
> +
> +maintainers:
> + - Sivaprakash Murugesan <sivaprak@codeaurora.org>
> +
> +description:
> + QCOM PCIe controller uses Designware IP with Qualcomm specific hardware
> + wrappers.
> +
> +properties:
> + compatible:
> + enum:
> + - qcom,pcie-apq8064
> + - qcom,pcie-apq8084
> + - qcom,pcie-ipq4019
> + - qcom,pcie-ipq8064
> + - qcom,pcie-ipq8074
> + - qcom,pcie-msm8996
> + - qcom,pcie-qcs404
> + - qcom,pcie-sdm845
> +
> + reg:
> + description: Register ranges as listed in the reg-names property
Can drop this.
> + maxItems: 4
> +
> + reg-names:
> + items:
> + - const: dbi
> + - const: elbi
> + - const: parf
> + - const: config
> +
> + ranges:
> + maxItems: 2
> +
> + interrupts:
> + items:
> + - description: MSI interrupts
> +
> + interrupt-names:
> + const: msi
> +
> + "#interrupt-cells":
In pci-bus.yaml, so you can drop.
> + const: 1
> +
> + interrupt-map-mask:
In pci-bus.yaml, so you can drop.
> + items:
> + - description: standard PCI properties to define mapping of PCIe
> + interface to interrupt numbers.
> +
> + interrupt-map:
> + maxItems: 4
> +
> + clocks:
> + minItems: 1
> + maxItems: 7
> +
> + clock-names:
> + minItems: 1
> + maxItems: 7
> +
> + resets:
> + minItems: 1
> + maxItems: 12
> +
> + reset-names:
> + minItems: 1
> + maxItems: 12
> +
> + power-domains:
> + maxItems: 1
> +
> + vdda-supply:
> + description: phandle to power supply
> +
> + vdda_phy-supply:
> + description: phandle to the power supply to PHY
> +
> + vdda_refclk-supply:
> + description: phandle to power supply for ref clock generator
> +
> + vddpe-3v3-supply:
> + description: PCIe endpoint power supply
> +
> + phys:
> + maxItems: 1
> + items:
> + - description: phandle to the PHY block
Can drop 'items'.
With those fixed,
Reviewed-by: Rob Herring <robh@kernel.org>
next prev parent reply other threads:[~2020-07-28 15:27 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-07-26 15:06 [PATCH V2] dt-bindings: pci: convert QCOM pci bindings to YAML Sivaprakash Murugesan
2020-07-27 21:15 ` Rob Herring
2020-07-28 15:27 ` Rob Herring [this message]
2020-07-28 15:54 ` Rob Herring
2020-07-29 2:49 ` Sivaprakash Murugesan
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to='CAL_Jsq+-rwG73mEkYmMQcnxHoBpbFMWHKDvzUK=6-fMAo77-9w@mail.gmail.com' \
--to=robh+dt@kernel.org \
--cc=agross@kernel.org \
--cc=bhelgaas@google.com \
--cc=bjorn.andersson@linaro.org \
--cc=devicetree@vger.kernel.org \
--cc=linux-arm-msm@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-pci@vger.kernel.org \
--cc=sivaprak@codeaurora.org \
--cc=sivaprak@qti.qualcomm.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).