[PATCH v2 1/2] dt-bindings: pci: tegra: Remove PLL power supplies

[PATCH v2 1/2] dt-bindings: pci: tegra: Remove PLL power supplies

[Thierry Reding]

From: Thierry Reding <treding@nvidia.com>

The XUSB pad controller, which provides access to various USB, PCI and
SATA pads (or PHYs), needs to bring up the PLLs associated with these
pads. In order to properly do so, it needs to control the power supplied
to these PLLs.

Remove the PLL power supplies from the PCIe controller because it does
not need direct access to them. Instead it will only use the configured
pads provided by the XUSB pad controller.

Signed-off-by: Thierry Reding <treding@nvidia.com>
---
Hi Rob,

I already made this change as part of the conversion series, but wanted
to send this out as part of this subseries since it addresses a fairly
long-standing issue that I'd like to clean up irrespective of the DT
binding conversion. Since it looks like the conversion series will take
a bit longer, I think it makes sense to send this out separately.

Thierry

 .../devicetree/bindings/pci/nvidia,tegra20-pcie.txt  | 12 ------------
 1 file changed, 12 deletions(-)

diff --git a/Documentation/devicetree/bindings/pci/nvidia,tegra20-pcie.txt b/Documentation/devicetree/bindings/pci/nvidia,tegra20-pcie.txt
index 7939bca47861..d099f3476ccc 100644
--- a/Documentation/devicetree/bindings/pci/nvidia,tegra20-pcie.txt
+++ b/Documentation/devicetree/bindings/pci/nvidia,tegra20-pcie.txt
@@ -112,28 +112,16 @@ Power supplies for Tegra124:
 - Required:
   - avddio-pex-supply: Power supply for analog PCIe logic. Must supply 1.05 V.
   - dvddio-pex-supply: Power supply for digital PCIe I/O. Must supply 1.05 V.
-  - avdd-pex-pll-supply: Power supply for dedicated (internal) PCIe PLL. Must
-    supply 1.05 V.
   - hvdd-pex-supply: High-voltage supply for PCIe I/O and PCIe output clocks.
     Must supply 3.3 V.
-  - hvdd-pex-pll-e-supply: High-voltage supply for PLLE (shared with USB3).
-    Must supply 3.3 V.
   - vddio-pex-ctl-supply: Power supply for PCIe control I/O partition. Must
     supply 2.8-3.3 V.
-  - avdd-pll-erefe-supply: Power supply for PLLE (shared with USB3). Must
-    supply 1.05 V.
 
 Power supplies for Tegra210:
 - Required:
-  - avdd-pll-uerefe-supply: Power supply for PLLE (shared with USB3). Must
-    supply 1.05 V.
   - hvddio-pex-supply: High-voltage supply for PCIe I/O and PCIe output
     clocks. Must supply 1.8 V.
   - dvddio-pex-supply: Power supply for digital PCIe I/O. Must supply 1.05 V.
-  - dvdd-pex-pll-supply: Power supply for dedicated (internal) PCIe PLL. Must
-    supply 1.05 V.
-  - hvdd-pex-pll-e-supply: High-voltage supply for PLLE (shared with USB3).
-    Must supply 3.3 V.
   - vddio-pex-ctl-supply: Power supply for PCIe control I/O partition. Must
     supply 1.8 V.
 
-- 
2.27.0

[PATCH v2 2/2] PCI: tegra: Remove PLL power supplies

[Thierry Reding]

From: Thierry Reding <treding@nvidia.com>

The Tegra PCI controller driver doesn't need to control the PLL power
supplies directly, but rather uses the pads provided by the XUSB pad
controller, which in turn is responsible for supplying power to the
PLLs.

Signed-off-by: Thierry Reding <treding@nvidia.com>
---
 drivers/pci/controller/pci-tegra.c | 10 ++--------
 1 file changed, 2 insertions(+), 8 deletions(-)

diff --git a/drivers/pci/controller/pci-tegra.c b/drivers/pci/controller/pci-tegra.c
index 235b456698fc..f87a09d21eb0 100644
--- a/drivers/pci/controller/pci-tegra.c
+++ b/drivers/pci/controller/pci-tegra.c
@@ -2025,7 +2025,7 @@ static int tegra_pcie_get_regulators(struct tegra_pcie *pcie, u32 lane_mask)
 		pcie->supplies[i++].supply = "hvdd-pex";
 		pcie->supplies[i++].supply = "vddio-pexctl-aud";
 	} else if (of_device_is_compatible(np, "nvidia,tegra210-pcie")) {
-		pcie->num_supplies = 6;
+		pcie->num_supplies = 3;
 
 		pcie->supplies = devm_kcalloc(pcie->dev, pcie->num_supplies,
 					      sizeof(*pcie->supplies),
@@ -2033,14 +2033,11 @@ static int tegra_pcie_get_regulators(struct tegra_pcie *pcie, u32 lane_mask)
 		if (!pcie->supplies)
 			return -ENOMEM;
 
-		pcie->supplies[i++].supply = "avdd-pll-uerefe";
 		pcie->supplies[i++].supply = "hvddio-pex";
 		pcie->supplies[i++].supply = "dvddio-pex";
-		pcie->supplies[i++].supply = "dvdd-pex-pll";
-		pcie->supplies[i++].supply = "hvdd-pex-pll-e";
 		pcie->supplies[i++].supply = "vddio-pex-ctl";
 	} else if (of_device_is_compatible(np, "nvidia,tegra124-pcie")) {
-		pcie->num_supplies = 7;
+		pcie->num_supplies = 4;
 
 		pcie->supplies = devm_kcalloc(dev, pcie->num_supplies,
 					      sizeof(*pcie->supplies),
@@ -2050,11 +2047,8 @@ static int tegra_pcie_get_regulators(struct tegra_pcie *pcie, u32 lane_mask)
 
 		pcie->supplies[i++].supply = "avddio-pex";
 		pcie->supplies[i++].supply = "dvddio-pex";
-		pcie->supplies[i++].supply = "avdd-pex-pll";
 		pcie->supplies[i++].supply = "hvdd-pex";
-		pcie->supplies[i++].supply = "hvdd-pex-pll-e";
 		pcie->supplies[i++].supply = "vddio-pex-ctl";
-		pcie->supplies[i++].supply = "avdd-pll-erefe";
 	} else if (of_device_is_compatible(np, "nvidia,tegra30-pcie")) {
 		bool need_pexa = false, need_pexb = false;
 
-- 
2.27.0

Re: [PATCH v2 2/2] PCI: tegra: Remove PLL power supplies

[Thierry Reding]

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On Tue, Jun 23, 2020 at 04:55:28PM +0200, Thierry Reding wrote:
> From: Thierry Reding <treding@nvidia.com>
> 
> The Tegra PCI controller driver doesn't need to control the PLL power
> supplies directly, but rather uses the pads provided by the XUSB pad
> controller, which in turn is responsible for supplying power to the
> PLLs.
> 
> Signed-off-by: Thierry Reding <treding@nvidia.com>
> ---
>  drivers/pci/controller/pci-tegra.c | 10 ++--------
>  1 file changed, 2 insertions(+), 8 deletions(-)

Hi Lorenzo,

do you have any comments on this? Can we get this into v5.9?

Thanks,
Thierry

> diff --git a/drivers/pci/controller/pci-tegra.c b/drivers/pci/controller/pci-tegra.c
> index 235b456698fc..f87a09d21eb0 100644
> --- a/drivers/pci/controller/pci-tegra.c
> +++ b/drivers/pci/controller/pci-tegra.c
> @@ -2025,7 +2025,7 @@ static int tegra_pcie_get_regulators(struct tegra_pcie *pcie, u32 lane_mask)
>  		pcie->supplies[i++].supply = "hvdd-pex";
>  		pcie->supplies[i++].supply = "vddio-pexctl-aud";
>  	} else if (of_device_is_compatible(np, "nvidia,tegra210-pcie")) {
> -		pcie->num_supplies = 6;
> +		pcie->num_supplies = 3;
>  
>  		pcie->supplies = devm_kcalloc(pcie->dev, pcie->num_supplies,
>  					      sizeof(*pcie->supplies),
> @@ -2033,14 +2033,11 @@ static int tegra_pcie_get_regulators(struct tegra_pcie *pcie, u32 lane_mask)
>  		if (!pcie->supplies)
>  			return -ENOMEM;
>  
> -		pcie->supplies[i++].supply = "avdd-pll-uerefe";
>  		pcie->supplies[i++].supply = "hvddio-pex";
>  		pcie->supplies[i++].supply = "dvddio-pex";
> -		pcie->supplies[i++].supply = "dvdd-pex-pll";
> -		pcie->supplies[i++].supply = "hvdd-pex-pll-e";
>  		pcie->supplies[i++].supply = "vddio-pex-ctl";
>  	} else if (of_device_is_compatible(np, "nvidia,tegra124-pcie")) {
> -		pcie->num_supplies = 7;
> +		pcie->num_supplies = 4;
>  
>  		pcie->supplies = devm_kcalloc(dev, pcie->num_supplies,
>  					      sizeof(*pcie->supplies),
> @@ -2050,11 +2047,8 @@ static int tegra_pcie_get_regulators(struct tegra_pcie *pcie, u32 lane_mask)
>  
>  		pcie->supplies[i++].supply = "avddio-pex";
>  		pcie->supplies[i++].supply = "dvddio-pex";
> -		pcie->supplies[i++].supply = "avdd-pex-pll";
>  		pcie->supplies[i++].supply = "hvdd-pex";
> -		pcie->supplies[i++].supply = "hvdd-pex-pll-e";
>  		pcie->supplies[i++].supply = "vddio-pex-ctl";
> -		pcie->supplies[i++].supply = "avdd-pll-erefe";
>  	} else if (of_device_is_compatible(np, "nvidia,tegra30-pcie")) {
>  		bool need_pexa = false, need_pexb = false;
>  
> -- 
> 2.27.0
> 

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Re: [PATCH v2 2/2] PCI: tegra: Remove PLL power supplies

[Lorenzo Pieralisi]

On Thu, Jul 16, 2020 at 03:00:34PM +0200, Thierry Reding wrote:
> On Tue, Jun 23, 2020 at 04:55:28PM +0200, Thierry Reding wrote:
> > From: Thierry Reding <treding@nvidia.com>
> > 
> > The Tegra PCI controller driver doesn't need to control the PLL power
> > supplies directly, but rather uses the pads provided by the XUSB pad
> > controller, which in turn is responsible for supplying power to the
> > PLLs.
> > 
> > Signed-off-by: Thierry Reding <treding@nvidia.com>
> > ---
> >  drivers/pci/controller/pci-tegra.c | 10 ++--------
> >  1 file changed, 2 insertions(+), 8 deletions(-)
> 
> Hi Lorenzo,
> 
> do you have any comments on this? Can we get this into v5.9?

Yes we can if Rob is happy with patch (1).

Thanks,
Lorenzo

> Thanks,
> Thierry
> 
> > diff --git a/drivers/pci/controller/pci-tegra.c b/drivers/pci/controller/pci-tegra.c
> > index 235b456698fc..f87a09d21eb0 100644
> > --- a/drivers/pci/controller/pci-tegra.c
> > +++ b/drivers/pci/controller/pci-tegra.c
> > @@ -2025,7 +2025,7 @@ static int tegra_pcie_get_regulators(struct tegra_pcie *pcie, u32 lane_mask)
> >  		pcie->supplies[i++].supply = "hvdd-pex";
> >  		pcie->supplies[i++].supply = "vddio-pexctl-aud";
> >  	} else if (of_device_is_compatible(np, "nvidia,tegra210-pcie")) {
> > -		pcie->num_supplies = 6;
> > +		pcie->num_supplies = 3;
> >  
> >  		pcie->supplies = devm_kcalloc(pcie->dev, pcie->num_supplies,
> >  					      sizeof(*pcie->supplies),
> > @@ -2033,14 +2033,11 @@ static int tegra_pcie_get_regulators(struct tegra_pcie *pcie, u32 lane_mask)
> >  		if (!pcie->supplies)
> >  			return -ENOMEM;
> >  
> > -		pcie->supplies[i++].supply = "avdd-pll-uerefe";
> >  		pcie->supplies[i++].supply = "hvddio-pex";
> >  		pcie->supplies[i++].supply = "dvddio-pex";
> > -		pcie->supplies[i++].supply = "dvdd-pex-pll";
> > -		pcie->supplies[i++].supply = "hvdd-pex-pll-e";
> >  		pcie->supplies[i++].supply = "vddio-pex-ctl";
> >  	} else if (of_device_is_compatible(np, "nvidia,tegra124-pcie")) {
> > -		pcie->num_supplies = 7;
> > +		pcie->num_supplies = 4;
> >  
> >  		pcie->supplies = devm_kcalloc(dev, pcie->num_supplies,
> >  					      sizeof(*pcie->supplies),
> > @@ -2050,11 +2047,8 @@ static int tegra_pcie_get_regulators(struct tegra_pcie *pcie, u32 lane_mask)
> >  
> >  		pcie->supplies[i++].supply = "avddio-pex";
> >  		pcie->supplies[i++].supply = "dvddio-pex";
> > -		pcie->supplies[i++].supply = "avdd-pex-pll";
> >  		pcie->supplies[i++].supply = "hvdd-pex";
> > -		pcie->supplies[i++].supply = "hvdd-pex-pll-e";
> >  		pcie->supplies[i++].supply = "vddio-pex-ctl";
> > -		pcie->supplies[i++].supply = "avdd-pll-erefe";
> >  	} else if (of_device_is_compatible(np, "nvidia,tegra30-pcie")) {
> >  		bool need_pexa = false, need_pexb = false;
> >  
> > -- 
> > 2.27.0
> > 

Re: [PATCH v2 2/2] PCI: tegra: Remove PLL power supplies

[Thierry Reding]

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On Thu, Jul 16, 2020 at 03:07:13PM +0100, Lorenzo Pieralisi wrote:
> On Thu, Jul 16, 2020 at 03:00:34PM +0200, Thierry Reding wrote:
> > On Tue, Jun 23, 2020 at 04:55:28PM +0200, Thierry Reding wrote:
> > > From: Thierry Reding <treding@nvidia.com>
> > > 
> > > The Tegra PCI controller driver doesn't need to control the PLL power
> > > supplies directly, but rather uses the pads provided by the XUSB pad
> > > controller, which in turn is responsible for supplying power to the
> > > PLLs.
> > > 
> > > Signed-off-by: Thierry Reding <treding@nvidia.com>
> > > ---
> > >  drivers/pci/controller/pci-tegra.c | 10 ++--------
> > >  1 file changed, 2 insertions(+), 8 deletions(-)
> > 
> > Hi Lorenzo,
> > 
> > do you have any comments on this? Can we get this into v5.9?
> 
> Yes we can if Rob is happy with patch (1).

I think this is mostly orthogonal to the bindings. We're already
controlling these supplies from the UPHY driver and controlling them
from the PCI driver is completely broken.

So I think technically these two patches could be applied separately,
but it's fine if you want to wait for Rob's feedback.

Thierry

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Re: [PATCH v2 2/2] PCI: tegra: Remove PLL power supplies

[Rob Herring]

On Tue, Jun 23, 2020 at 8:55 AM Thierry Reding <thierry.reding@gmail.com> wrote:
>
> From: Thierry Reding <treding@nvidia.com>
>
> The Tegra PCI controller driver doesn't need to control the PLL power
> supplies directly, but rather uses the pads provided by the XUSB pad
> controller, which in turn is responsible for supplying power to the
> PLLs.
>
> Signed-off-by: Thierry Reding <treding@nvidia.com>
> ---
>  drivers/pci/controller/pci-tegra.c | 10 ++--------
>  1 file changed, 2 insertions(+), 8 deletions(-)

What's going to happen here with a new dtb and an old kernel? Is it
going to error out due to missing supplies?

Rob

Re: [PATCH v2 2/2] PCI: tegra: Remove PLL power supplies

[Thierry Reding]

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On Mon, Jul 27, 2020 at 10:21:42AM -0600, Rob Herring wrote:
> On Tue, Jun 23, 2020 at 8:55 AM Thierry Reding <thierry.reding@gmail.com> wrote:
> >
> > From: Thierry Reding <treding@nvidia.com>
> >
> > The Tegra PCI controller driver doesn't need to control the PLL power
> > supplies directly, but rather uses the pads provided by the XUSB pad
> > controller, which in turn is responsible for supplying power to the
> > PLLs.
> >
> > Signed-off-by: Thierry Reding <treding@nvidia.com>
> > ---
> >  drivers/pci/controller/pci-tegra.c | 10 ++--------
> >  1 file changed, 2 insertions(+), 8 deletions(-)
> 
> What's going to happen here with a new dtb and an old kernel? Is it
> going to error out due to missing supplies?

It's not going to error out but fallback to the "dummy" regulator, so
this should be fine from a forwards-compatibility point of view. Though
I didn't think we technically cared about that direction very much.

Thierry

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Re: [PATCH v2 2/2] PCI: tegra: Remove PLL power supplies

[Rob Herring]

On Mon, Jul 27, 2020 at 11:21 AM Thierry Reding
<thierry.reding@gmail.com> wrote:
>
> On Mon, Jul 27, 2020 at 10:21:42AM -0600, Rob Herring wrote:
> > On Tue, Jun 23, 2020 at 8:55 AM Thierry Reding <thierry.reding@gmail.com> wrote:
> > >
> > > From: Thierry Reding <treding@nvidia.com>
> > >
> > > The Tegra PCI controller driver doesn't need to control the PLL power
> > > supplies directly, but rather uses the pads provided by the XUSB pad
> > > controller, which in turn is responsible for supplying power to the
> > > PLLs.
> > >
> > > Signed-off-by: Thierry Reding <treding@nvidia.com>
> > > ---
> > >  drivers/pci/controller/pci-tegra.c | 10 ++--------
> > >  1 file changed, 2 insertions(+), 8 deletions(-)
> >
> > What's going to happen here with a new dtb and an old kernel? Is it
> > going to error out due to missing supplies?
>
> It's not going to error out but fallback to the "dummy" regulator, so
> this should be fine from a forwards-compatibility point of view. Though
> I didn't think we technically cared about that direction very much.

AIUI, SUSE ships newer DTs with stable kernels. Of course, the dtb's
shouldn't really come from the OS vendors, but you wouldn't want a
newer firmware (w/ dtb) to break your OS either.

In any case,

Reviewed-by: Rob Herring <robh@kernel.org>

Rob

Re: [PATCH v2 1/2] dt-bindings: pci: tegra: Remove PLL power supplies

[Thierry Reding]

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On Tue, Jun 23, 2020 at 04:55:27PM +0200, Thierry Reding wrote:
> From: Thierry Reding <treding@nvidia.com>
> 
> The XUSB pad controller, which provides access to various USB, PCI and
> SATA pads (or PHYs), needs to bring up the PLLs associated with these
> pads. In order to properly do so, it needs to control the power supplied
> to these PLLs.
> 
> Remove the PLL power supplies from the PCIe controller because it does
> not need direct access to them. Instead it will only use the configured
> pads provided by the XUSB pad controller.
> 
> Signed-off-by: Thierry Reding <treding@nvidia.com>
> ---
> Hi Rob,
> 
> I already made this change as part of the conversion series, but wanted
> to send this out as part of this subseries since it addresses a fairly
> long-standing issue that I'd like to clean up irrespective of the DT
> binding conversion. Since it looks like the conversion series will take
> a bit longer, I think it makes sense to send this out separately.
> 
> Thierry
> 
>  .../devicetree/bindings/pci/nvidia,tegra20-pcie.txt  | 12 ------------
>  1 file changed, 12 deletions(-)

Hi Rob, any feedback on this?

Thanks,
Thierry

> diff --git a/Documentation/devicetree/bindings/pci/nvidia,tegra20-pcie.txt b/Documentation/devicetree/bindings/pci/nvidia,tegra20-pcie.txt
> index 7939bca47861..d099f3476ccc 100644
> --- a/Documentation/devicetree/bindings/pci/nvidia,tegra20-pcie.txt
> +++ b/Documentation/devicetree/bindings/pci/nvidia,tegra20-pcie.txt
> @@ -112,28 +112,16 @@ Power supplies for Tegra124:
>  - Required:
>    - avddio-pex-supply: Power supply for analog PCIe logic. Must supply 1.05 V.
>    - dvddio-pex-supply: Power supply for digital PCIe I/O. Must supply 1.05 V.
> -  - avdd-pex-pll-supply: Power supply for dedicated (internal) PCIe PLL. Must
> -    supply 1.05 V.
>    - hvdd-pex-supply: High-voltage supply for PCIe I/O and PCIe output clocks.
>      Must supply 3.3 V.
> -  - hvdd-pex-pll-e-supply: High-voltage supply for PLLE (shared with USB3).
> -    Must supply 3.3 V.
>    - vddio-pex-ctl-supply: Power supply for PCIe control I/O partition. Must
>      supply 2.8-3.3 V.
> -  - avdd-pll-erefe-supply: Power supply for PLLE (shared with USB3). Must
> -    supply 1.05 V.
>  
>  Power supplies for Tegra210:
>  - Required:
> -  - avdd-pll-uerefe-supply: Power supply for PLLE (shared with USB3). Must
> -    supply 1.05 V.
>    - hvddio-pex-supply: High-voltage supply for PCIe I/O and PCIe output
>      clocks. Must supply 1.8 V.
>    - dvddio-pex-supply: Power supply for digital PCIe I/O. Must supply 1.05 V.
> -  - dvdd-pex-pll-supply: Power supply for dedicated (internal) PCIe PLL. Must
> -    supply 1.05 V.
> -  - hvdd-pex-pll-e-supply: High-voltage supply for PLLE (shared with USB3).
> -    Must supply 3.3 V.
>    - vddio-pex-ctl-supply: Power supply for PCIe control I/O partition. Must
>      supply 1.8 V.
>  
> -- 
> 2.27.0
> 

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Re: [PATCH v2 1/2] dt-bindings: pci: tegra: Remove PLL power supplies

[Lorenzo Pieralisi]

On Thu, Jul 16, 2020 at 02:59:45PM +0200, Thierry Reding wrote:
> On Tue, Jun 23, 2020 at 04:55:27PM +0200, Thierry Reding wrote:
> > From: Thierry Reding <treding@nvidia.com>
> > 
> > The XUSB pad controller, which provides access to various USB, PCI and
> > SATA pads (or PHYs), needs to bring up the PLLs associated with these
> > pads. In order to properly do so, it needs to control the power supplied
> > to these PLLs.
> > 
> > Remove the PLL power supplies from the PCIe controller because it does
> > not need direct access to them. Instead it will only use the configured
> > pads provided by the XUSB pad controller.
> > 
> > Signed-off-by: Thierry Reding <treding@nvidia.com>
> > ---
> > Hi Rob,
> > 
> > I already made this change as part of the conversion series, but wanted
> > to send this out as part of this subseries since it addresses a fairly
> > long-standing issue that I'd like to clean up irrespective of the DT
> > binding conversion. Since it looks like the conversion series will take
> > a bit longer, I think it makes sense to send this out separately.
> > 
> > Thierry
> > 
> >  .../devicetree/bindings/pci/nvidia,tegra20-pcie.txt  | 12 ------------
> >  1 file changed, 12 deletions(-)
> 
> Hi Rob, any feedback on this?

Hi Rob,

I'd like to queue both patches, please let me know if that's OK with
you.

Thank you very much.

Lorenzo

> > index 7939bca47861..d099f3476ccc 100644
> > --- a/Documentation/devicetree/bindings/pci/nvidia,tegra20-pcie.txt
> > +++ b/Documentation/devicetree/bindings/pci/nvidia,tegra20-pcie.txt
> > @@ -112,28 +112,16 @@ Power supplies for Tegra124:
> >  - Required:
> >    - avddio-pex-supply: Power supply for analog PCIe logic. Must supply 1.05 V.
> >    - dvddio-pex-supply: Power supply for digital PCIe I/O. Must supply 1.05 V.
> > -  - avdd-pex-pll-supply: Power supply for dedicated (internal) PCIe PLL. Must
> > -    supply 1.05 V.
> >    - hvdd-pex-supply: High-voltage supply for PCIe I/O and PCIe output clocks.
> >      Must supply 3.3 V.
> > -  - hvdd-pex-pll-e-supply: High-voltage supply for PLLE (shared with USB3).
> > -    Must supply 3.3 V.
> >    - vddio-pex-ctl-supply: Power supply for PCIe control I/O partition. Must
> >      supply 2.8-3.3 V.
> > -  - avdd-pll-erefe-supply: Power supply for PLLE (shared with USB3). Must
> > -    supply 1.05 V.
> >  
> >  Power supplies for Tegra210:
> >  - Required:
> > -  - avdd-pll-uerefe-supply: Power supply for PLLE (shared with USB3). Must
> > -    supply 1.05 V.
> >    - hvddio-pex-supply: High-voltage supply for PCIe I/O and PCIe output
> >      clocks. Must supply 1.8 V.
> >    - dvddio-pex-supply: Power supply for digital PCIe I/O. Must supply 1.05 V.
> > -  - dvdd-pex-pll-supply: Power supply for dedicated (internal) PCIe PLL. Must
> > -    supply 1.05 V.
> > -  - hvdd-pex-pll-e-supply: High-voltage supply for PLLE (shared with USB3).
> > -    Must supply 3.3 V.
> >    - vddio-pex-ctl-supply: Power supply for PCIe control I/O partition. Must
> >      supply 1.8 V.
> >  
> > -- 
> > 2.27.0
> > 

Re: [PATCH v2 1/2] dt-bindings: pci: tegra: Remove PLL power supplies

[Rob Herring]

On Tue, Jun 23, 2020 at 8:55 AM Thierry Reding <thierry.reding@gmail.com> wrote:
>
> From: Thierry Reding <treding@nvidia.com>
>
> The XUSB pad controller, which provides access to various USB, PCI and
> SATA pads (or PHYs), needs to bring up the PLLs associated with these
> pads. In order to properly do so, it needs to control the power supplied
> to these PLLs.
>
> Remove the PLL power supplies from the PCIe controller because it does
> not need direct access to them. Instead it will only use the configured
> pads provided by the XUSB pad controller.
>
> Signed-off-by: Thierry Reding <treding@nvidia.com>
> ---
> Hi Rob,
>
> I already made this change as part of the conversion series, but wanted
> to send this out as part of this subseries since it addresses a fairly
> long-standing issue that I'd like to clean up irrespective of the DT
> binding conversion. Since it looks like the conversion series will take
> a bit longer, I think it makes sense to send this out separately.
>
> Thierry
>
>  .../devicetree/bindings/pci/nvidia,tegra20-pcie.txt  | 12 ------------
>  1 file changed, 12 deletions(-)

Reviewed-by: Rob Herring <robh@kernel.org>

Re: [PATCH v2 1/2] dt-bindings: pci: tegra: Remove PLL power supplies

[Lorenzo Pieralisi]

On Tue, Jun 23, 2020 at 04:55:27PM +0200, Thierry Reding wrote:
> From: Thierry Reding <treding@nvidia.com>
> 
> The XUSB pad controller, which provides access to various USB, PCI and
> SATA pads (or PHYs), needs to bring up the PLLs associated with these
> pads. In order to properly do so, it needs to control the power supplied
> to these PLLs.
> 
> Remove the PLL power supplies from the PCIe controller because it does
> not need direct access to them. Instead it will only use the configured
> pads provided by the XUSB pad controller.
> 
> Signed-off-by: Thierry Reding <treding@nvidia.com>
> ---
> Hi Rob,
> 
> I already made this change as part of the conversion series, but wanted
> to send this out as part of this subseries since it addresses a fairly
> long-standing issue that I'd like to clean up irrespective of the DT
> binding conversion. Since it looks like the conversion series will take
> a bit longer, I think it makes sense to send this out separately.

Applied the series to pci/tegra, thanks.

Lorenzo

> Thierry
> 
>  .../devicetree/bindings/pci/nvidia,tegra20-pcie.txt  | 12 ------------
>  1 file changed, 12 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/pci/nvidia,tegra20-pcie.txt b/Documentation/devicetree/bindings/pci/nvidia,tegra20-pcie.txt
> index 7939bca47861..d099f3476ccc 100644
> --- a/Documentation/devicetree/bindings/pci/nvidia,tegra20-pcie.txt
> +++ b/Documentation/devicetree/bindings/pci/nvidia,tegra20-pcie.txt
> @@ -112,28 +112,16 @@ Power supplies for Tegra124:
>  - Required:
>    - avddio-pex-supply: Power supply for analog PCIe logic. Must supply 1.05 V.
>    - dvddio-pex-supply: Power supply for digital PCIe I/O. Must supply 1.05 V.
> -  - avdd-pex-pll-supply: Power supply for dedicated (internal) PCIe PLL. Must
> -    supply 1.05 V.
>    - hvdd-pex-supply: High-voltage supply for PCIe I/O and PCIe output clocks.
>      Must supply 3.3 V.
> -  - hvdd-pex-pll-e-supply: High-voltage supply for PLLE (shared with USB3).
> -    Must supply 3.3 V.
>    - vddio-pex-ctl-supply: Power supply for PCIe control I/O partition. Must
>      supply 2.8-3.3 V.
> -  - avdd-pll-erefe-supply: Power supply for PLLE (shared with USB3). Must
> -    supply 1.05 V.
>  
>  Power supplies for Tegra210:
>  - Required:
> -  - avdd-pll-uerefe-supply: Power supply for PLLE (shared with USB3). Must
> -    supply 1.05 V.
>    - hvddio-pex-supply: High-voltage supply for PCIe I/O and PCIe output
>      clocks. Must supply 1.8 V.
>    - dvddio-pex-supply: Power supply for digital PCIe I/O. Must supply 1.05 V.
> -  - dvdd-pex-pll-supply: Power supply for dedicated (internal) PCIe PLL. Must
> -    supply 1.05 V.
> -  - hvdd-pex-pll-e-supply: High-voltage supply for PLLE (shared with USB3).
> -    Must supply 3.3 V.
>    - vddio-pex-ctl-supply: Power supply for PCIe control I/O partition. Must
>      supply 1.8 V.
>  
> -- 
> 2.27.0
>