Re: [PATCH v3 0/6] MIPS: ralink: fix PCI IO resources

From: Sergio Paracuellos <sergio.paracuellos@gmail.com>
To: Greg KH <gregkh@linuxfoundation.org>
Cc: Thomas Bogendoerfer <tsbogend@alpha.franken.de>,
	Rob Herring <robh@kernel.org>, Arnd Bergmann <arnd@arndb.de>,
	Catalin Marinas <catalin.marinas@arm.com>,
	Liviu Dudau <Liviu.Dudau@arm.com>,
	Bjorn Helgaas <bhelgaas@google.com>,
	Matthias Brugger <matthias.bgg@gmail.com>,
	"open list:MIPS" <linux-mips@vger.kernel.org>,
	linux-pci <linux-pci@vger.kernel.org>,
	linux-staging@lists.linux.dev, NeilBrown <neil@brown.name>,
	linux-kernel <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH v3 0/6] MIPS: ralink: fix PCI IO resources
Date: Tue, 5 Oct 2021 12:51:48 +0200	[thread overview]
Message-ID: <CAMhs-H-YDg=q6sJhhawkqkfdLCj=EhcX8G-1WGH4K928ToLYLw@mail.gmail.com> (raw)
In-Reply-To: <YVwqpCbYzxUWm5LJ@kroah.com>

On Tue, Oct 5, 2021 at 12:36 PM Greg KH <gregkh@linuxfoundation.org> wrote:
>
> On Sun, Oct 03, 2021 at 06:21:21PM +0200, Sergio Paracuellos wrote:
> > Hi Greg,
> >
> > On Sat, Sep 25, 2021 at 10:32 PM Sergio Paracuellos
> > <sergio.paracuellos@gmail.com> wrote:
> > >
> > > MIPs ralink need a special tratement regarding the way it handles PCI IO
> > > resources. On MIPS I/O ports are memory mapped, so we access them using normal
> > > load/store instructions. MIPS 'plat_mem_setup()' function does a call to
> > > 'set_io_port_base(KSEG1)'. There, variable 'mips_io_port_base'
> > > is set then using this address which is a virtual address to which all
> > > ports are being mapped. Ralink I/O space has a mapping of bus address
> > > equal to the window into the mmio space, with an offset of IO start range
> > > cpu address. This means that to have this working we need:
> > > - linux port numbers in the range 0-0xffff.
> > > - pci port numbers in the range 0-0xffff.
> > > - io_offset being zero.
> > >
> > > These means at the end to have bus address 0 mapped to IO range cpu address.
> > > We need a way of properly set 'mips_io_port_base' with a virtually mapped
> > > value of the IO cpu address.
> > >
> > > This series do the following approach:
> > > 1) Revert two bad commit from a previous attempt of make this work [0].
> > > 2) Set PCI_IOBASE to mips 'mips_io_port_base'.
> > > 3) Allow architecture dependent 'pci_remap_iospace'.
> > > 4) Implement 'pci_remap_iospace' for MIPS.
> > > 5) Be sure IOBASE address for IO window is set with correct value.
> > >
> > > More context about this series appoach in this mail thread [1].
> > >
> > > Patches related with reverts are from this merge cycle so they are only
> > > added to the staging git tree. So to have all stuff together I'd like to
> > > get everybody Ack's to get all of this series through staging tree if
> > > possible :).
> > >
> > > Thanks in advance for your time.
> > >
> > > Changes in v3:
> > >  - Collect Arnd's Acked-by for the patches.
> > >  - Be sure IO resource start address is zero and WARN_ONCE if it is not
> > >    on MIPS pci_remap_iospace() patch. Also make use of 'resource_size'
> > >    instead of do the logic explicitly again.
> >
> > I think nothing is missing to get this added through the staging tree.
>
> Great, thanks for sticking with this, will go queue it up now.

Thanks!

Best regards,
    Sergio Paracuellos

>
> greg k-h