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From: Geert Uytterhoeven <geert@linux-m68k.org>
To: daire.mcnamara@microchip.com
Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
	Bjorn Helgaas <bhelgaas@google.com>,
	Rob Herring <robh@kernel.org>,
	linux-pci <linux-pci@vger.kernel.org>,
	Rob Herring <robh+dt@kernel.org>,
	"open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" 
	<devicetree@vger.kernel.org>,
	david.abdurachmanov@gmail.com, cyril.jean@microchip.com
Subject: Re: [PATCH v21 3/4] PCI: microchip: Add host driver for Microchip PCIe controller
Date: Wed, 10 Feb 2021 14:07:39 +0100	[thread overview]
Message-ID: <CAMuHMdXJQF3c1b6SXyHnuyA_huO7ZiKJ-_xm1r1h7VcGsv=n9A@mail.gmail.com> (raw)
In-Reply-To: <20210125162934.5335-4-daire.mcnamara@microchip.com>

Hi Daire,

On Mon, Jan 25, 2021 at 5:33 PM <daire.mcnamara@microchip.com> wrote:
> From: Daire McNamara <daire.mcnamara@microchip.com>
>
> Add support for the Microchip PolarFire PCIe controller when
> configured in host (Root Complex) mode.
>
> Signed-off-by: Daire McNamara <daire.mcnamara@microchip.com>
> Reviewed-by: Rob Herring <robh@kernel.org>

Thanks for your patch!

> --- a/drivers/pci/controller/Kconfig
> +++ b/drivers/pci/controller/Kconfig
> @@ -298,6 +298,16 @@ config PCI_LOONGSON
>           Say Y here if you want to enable PCI controller support on
>           Loongson systems.
>
> +config PCIE_MICROCHIP_HOST
> +       bool "Microchip AXI PCIe host bridge support"
> +       depends on PCI_MSI && OF
> +       select PCI_MSI_IRQ_DOMAIN
> +       select GENERIC_MSI_IRQ_DOMAIN
> +       select PCI_HOST_COMMON
> +       help
> +         Say Y here if you want kernel to support the Microchip AXI PCIe
> +         Host Bridge driver.

Is this PCIe host bridge accessible only from the PolarFire RISC-V
CPU cores, or also from softcores implemented in the PolarFire FPGA?

In case of the former, we want to add a

    depends on CONFIG_SOC_MICROCHIP_POLARFIRE || COMPILE_TEST

conditional.

> +
>  config PCIE_HISI_ERR
>         depends on ACPI_APEI_GHES && (ARM64 || COMPILE_TEST)
>         bool "HiSilicon HIP PCIe controller error handling driver"

Gr{oetje,eeting}s,

                        Geert


--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

  parent reply	other threads:[~2021-02-10 13:09 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-01-25 16:29 [PATCH v21 0/4] " daire.mcnamara
2021-01-25 16:29 ` [PATCH v21 1/4] PCI: Call platform_set_drvdata earlier in devm_pci_alloc_host_bridge daire.mcnamara
2021-01-25 16:29 ` [PATCH v21 2/4] dt-bindings: PCI: microchip: Add Microchip PolarFire host binding daire.mcnamara
2021-01-25 16:29 ` [PATCH v21 3/4] PCI: microchip: Add host driver for Microchip PCIe controller daire.mcnamara
2021-02-01 19:05   ` Lorenzo Pieralisi
     [not found]     ` <MN2PR11MB42691AE1B54DEAB5C1BAA11D96B59@MN2PR11MB4269.namprd11.prod.outlook.com>
2021-02-04 10:20       ` Lorenzo Pieralisi
2021-02-10 13:07   ` Geert Uytterhoeven [this message]
2021-02-11 13:03     ` Ben Dooks
2021-02-11 13:07       ` Geert Uytterhoeven
2021-02-16  9:54         ` Daire.McNamara
2022-01-27 20:20   ` Bjorn Helgaas
2022-01-28  9:55     ` Marc Zyngier
2022-01-28 13:16       ` Bjorn Helgaas
2021-01-25 16:29 ` [PATCH v21 4/4] MAINTAINERS: Add Daire McNamara as maintainer for the Microchip PCIe driver daire.mcnamara
2021-02-04 11:42 ` [PATCH v21 0/4] PCI: microchip: Add host driver for Microchip PCIe controller Lorenzo Pieralisi

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