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From: Fabio Estevam <festevam@gmail.com>
To: Fawad Lateef <fawadlateef@gmail.com>
Cc: Linux Kernel Mailing List <linux-kernel@vger.kernel.org>,
	linux-pci@vger.kernel.org
Subject: Re: Help needed in understanding weird PCIe issue on imx6q (PCIe just goes bad)
Date: Wed, 26 Feb 2020 20:40:23 -0300	[thread overview]
Message-ID: <CAOMZO5DvPr3srStsJ6KQph_v_=7=YGdcM4GQzi9yK+Km-wFBiQ@mail.gmail.com> (raw)
In-Reply-To: <CAGgoGu5u7WZUUaoVYvVWS5nuNZz25PgR=uHkqvzXV5xFOC7KuA@mail.gmail.com>

Hi Fawad,

On Sat, Feb 22, 2020 at 12:26 PM Fawad Lateef <fawadlateef@gmail.com> wrote:
>
> Hello,
>
> I am trying to figure-out an issue on our i.MX6Q platform based design
> where PCIe interface goes bad.
>
> We have a Phytec i.MX6Q eMMC SOM, attached to our custom designed
> board. PCIe root-complex from i.MX6Q is attached to PLX switch
> (PEX8605).
>
> Linux kernel version is 4.19.9x and also 4.14.134 (from phytec's

Does it happen with 5.4 or 5.5 too?

Which dts are you using?

> Then I enable the #PERST pin of PLX switch, everything is still good
> (no rescan on Linux is done yet)
>
> ~ # echo 139 > /sys/class/gpio/export
> ~ # echo out > /sys/class/gpio/gpio139/direction
> ~ # echo 1 > /sys/class/gpio/gpio139/value

Not sure why you toggle the PERST pin from userspace.

You should do it via reset-gpio property in the device tree.

  parent reply	other threads:[~2020-02-26 23:40 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-02-22 15:25 Help needed in understanding weird PCIe issue on imx6q (PCIe just goes bad) Fawad Lateef
2020-02-25  9:00 ` Fawad Lateef
2020-02-26 23:25 ` Bjorn Helgaas
2020-02-26 23:27   ` Bjorn Helgaas
2020-02-28 10:16     ` Fawad Lateef
2020-02-28 14:22       ` Bjorn Helgaas
2020-02-26 23:40 ` Fabio Estevam [this message]
2020-02-28 10:27   ` Fawad Lateef

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