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From: Dan Williams <dan.j.williams@intel.com>
To: Lukas Wunner <lukas@wunner.de>
Cc: Jonathan Cameron <Jonathan.Cameron@huawei.com>,
	Gavin Hindman <gavin.hindman@intel.com>,
	Linuxarm <linuxarm@huawei.com>,
	"Weiny, Ira" <ira.weiny@intel.com>,
	Linux PCI <linux-pci@vger.kernel.org>,
	linux-cxl@vger.kernel.org, CHUCK_LEVER <chuck.lever@oracle.com>
Subject: Re: [RFC PATCH 0/1] DOE usage with pcie/portdrv
Date: Wed, 11 May 2022 12:43:34 -0700	[thread overview]
Message-ID: <CAPcyv4hUKjt7QrA__wQ0KowfaxyQuMjHB5V-=rZBm=UbV4OvSg@mail.gmail.com> (raw)
In-Reply-To: <20220511191943.GB26623@wunner.de>

On Wed, May 11, 2022 at 12:20 PM Lukas Wunner <lukas@wunner.de> wrote:
>
> On Wed, May 11, 2022 at 09:13:45PM +0200, Lukas Wunner wrote:
> > When an IDE-capable device is runtime suspended to D3hot and later
> > runtime resumed to D0, it may not preserve its internal state.
> > (The No_Soft_Reset bit in the Power Management Control/Status Register
> > tells us whether the device is capable of preserving internal state
> > over a transition to D3hot, see PCIe r6.0, sec. 7.5.2.2.)
> >
> > Likewise, when an IDE-capable device is reset (e.g. due to Downstream
> > Port Containment, AER or a bus reset initiated by user space),
> > internal state is lost and must be reconstructed by pci_restore_state().
> > That state includes the SPDM session or IDE encryption.
>
> Digging a little further, sec. 6.33.8 says that "The No_Soft_Reset bit
> must be Set", so at least IDE will always survive a D3hot transition.
>
> But the reset argument still stands:  That same section says that all
> IDE streams transition to Insecure and all keys are invalidated upon
> reset.

Right, this isn't the only problem with reset vs ongoing CXL operations...

https://lore.kernel.org/linux-cxl/164740402242.3912056.8303625392871313860.stgit@dwillia2-desk3.amr.corp.intel.com/

  reply	other threads:[~2022-05-11 19:43 UTC|newest]

Thread overview: 22+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-05-03 15:34 [RFC PATCH 0/1] DOE usage with pcie/portdrv Jonathan Cameron
2022-05-03 15:34 ` [RFC PATCH 1/1] pcie/portdrv: Hack in DOE and CDAT support Jonathan Cameron
2022-05-06 22:40 ` [RFC PATCH 0/1] DOE usage with pcie/portdrv Dan Williams
2022-05-07 10:18   ` Lukas Wunner
2022-05-09  9:48     ` Jonathan Cameron
2022-05-11 19:13       ` Lukas Wunner
2022-05-11 19:19         ` Lukas Wunner
2022-05-11 19:43           ` Dan Williams [this message]
2022-05-14 13:55             ` Lukas Wunner
2022-05-16 17:01               ` Dan Williams
2022-05-27  9:39                 ` Lukas Wunner
2022-05-18 13:43               ` Christoph Hellwig
2022-05-18 15:08                 ` Dan Williams
2022-05-20  5:42                 ` Lukas Wunner
2022-05-20 15:37                   ` Dan Williams
2022-05-20 15:42                     ` Chuck Lever III
2022-05-11 19:42         ` Dan Williams
2022-05-11 20:22           ` Hindman, Gavin
2022-05-11 21:04             ` Dan Williams
2022-05-14 13:31           ` Lukas Wunner
2022-05-16 16:53             ` Dan Williams
2022-05-09  9:33   ` Jonathan Cameron

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