From: "Prasad Malisetty (Temp) (QUIC)" <quic_pmaliset@quicinc.com>
To: "manivannan.sadhasivam@linaro.org"
<manivannan.sadhasivam@linaro.org>,
"Prasad Malisetty (Temp) (QUIC)" <quic_pmaliset@quicinc.com>
Cc: "agross@kernel.org" <agross@kernel.org>,
"bjorn.andersson@linaro.org" <bjorn.andersson@linaro.org>,
"lorenzo.pieralisi@arm.com" <lorenzo.pieralisi@arm.com>,
"robh@kernel.org" <robh@kernel.org>,
"kw@linux.com" <kw@linux.com>,
"bhelgaas@google.com" <bhelgaas@google.com>,
"linux-pci@vger.kernel.org" <linux-pci@vger.kernel.org>,
"linux-arm-msm@vger.kernel.org" <linux-arm-msm@vger.kernel.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"Veerabhadrarao Badiganti (QUIC)" <quic_vbadigan@quicinc.com>,
"Rama Krishna (QUIC)" <quic_ramkri@quicinc.com>,
"swboyd@chromium.org" <swboyd@chromium.org>
Subject: RE: [PATCH v2] PCI: qcom: Add system PM support
Date: Tue, 15 Feb 2022 10:33:32 +0000 [thread overview]
Message-ID: <CO1PR02MB85376D985B785B9AEF4F4426E9349@CO1PR02MB8537.namprd02.prod.outlook.com> (raw)
In-Reply-To: <20220211091409.GB3223@thinkpad>
Hi Manivannan,
Thanks for review and comments.
Please see my comments inline.
Thanks
-Prasad
-----Original Message-----
From: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Sent: Friday, February 11, 2022 2:44 PM
To: Prasad Malisetty (Temp) (QUIC) <quic_pmaliset@quicinc.com>
Cc: agross@kernel.org; bjorn.andersson@linaro.org; lorenzo.pieralisi@arm.com; robh@kernel.org; kw@linux.com; bhelgaas@google.com; linux-pci@vger.kernel.org; linux-arm-msm@vger.kernel.org; linux-kernel@vger.kernel.org; Veerabhadrarao Badiganti (QUIC) <quic_vbadigan@quicinc.com>; Rama Krishna (QUIC) <quic_ramkri@quicinc.com>; swboyd@chromium.org
Subject: Re: [PATCH v2] PCI: qcom: Add system PM support
On top of Bjorn's review:
On Tue, Feb 01, 2022 at 11:37:56PM +0530, Prasad Malisetty wrote:
> Add suspend_noirq and resume_noirq callbacks to handle System suspend
> and resume in dwc pcie controller driver.
>
> When system suspends, send PME turnoff message to enter link into L2
> state. Along with powerdown the PHY, disable pipe clock, switch
> gcc_pcie_1_pipe_clk_src to XO if mux is supported and disable the pcie
> clocks, regulators.
>
> When system resumes, PCIe link will be re-established and setup rc
> settings.
>
> Signed-off-by: Prasad Malisetty <quic_pmaliset@quicinc.com>
> Reported-by: kernel test robot <lkp@intel.com>
>
> ---
> Changes since v1:
> - Removed unnecessary logs and modified log level suggested by Manivannan.
> - Removed platform specific callbacks as PM support is generic.
This is not still generic... Please see below.
> ---
> drivers/pci/controller/dwc/pcie-qcom.c | 97
> ++++++++++++++++++++++++++++++++++
> 1 file changed, 97 insertions(+)
>
> diff --git a/drivers/pci/controller/dwc/pcie-qcom.c
> b/drivers/pci/controller/dwc/pcie-qcom.c
> index c19cd506..d1dd6c7 100644
> --- a/drivers/pci/controller/dwc/pcie-qcom.c
> +++ b/drivers/pci/controller/dwc/pcie-qcom.c
> @@ -73,6 +73,8 @@
>
> #define PCIE20_PARF_Q2A_FLUSH 0x1AC
>
> +#define PCIE20_PARF_PM_STTS 0x24
> +
> #define PCIE20_MISC_CONTROL_1_REG 0x8BC
> #define DBI_RO_WR_EN 1
>
> @@ -1616,6 +1618,100 @@ static int qcom_pcie_probe(struct platform_device *pdev)
> return ret;
> }
>
> +static int qcom_pcie_send_pme_turnoff_msg(struct qcom_pcie *pcie) {
> + int ret = 0;
> + u32 val = 0, poll_val = 0;
> + u64 l23_rdy_poll_timeout = 100000;
> + struct dw_pcie *pci = pcie->pci;
> + struct device *dev = pci->dev;
> +
> + val = readl(pcie->elbi + PCIE20_ELBI_SYS_CTRL);
> + val |= BIT(4);
Define BIT(4)
>> Okay sure.
> + writel(val, pcie->elbi + PCIE20_ELBI_SYS_CTRL);
> +
> + ret = readl_poll_timeout((pcie->parf + PCIE20_PARF_PM_STTS), poll_val,
> + (poll_val & BIT(5)), 10000, l23_rdy_poll_timeout);
Define BIT(5)
>> Okay, I will update in next patch version.
> + if (!ret)
> + dev_info(dev, "PM_Enter_L23 is received\n");
Maybe print, "Device entered L23_Ready state"? Also this should be dev_dbg().
> + else
> + dev_err(dev, "PM_Enter_L23 is NOT received.PARF_PM_STTS 0x%x\n",
Maybe print, "Device failed to enter L23_Ready state"?
>> Sure, I will update in coming patch version.
> + readl_relaxed(pcie->parf + PCIE20_PARF_PM_STTS));
> +
> + return ret;
> +}
> +
> +static void qcom_pcie_host_disable(struct qcom_pcie *pcie) {
> + struct qcom_pcie_resources_2_7_0 *res = &pcie->res.v2_7_0;
> +
As Bjorn said this would only work for platforms supporting v2.7.0 ops. Please make it generic.
>>Sure, I removed the platform specific code but forgot to remove above line. I will update in next patch version.
> + /* Assert the reset of endpoint */
> + qcom_ep_reset_assert(pcie);
> +
> + /* Put PHY into POWER DOWN state */
> + phy_power_off(pcie->phy);
> +
> + writel(1, pcie->parf + PCIE20_PARF_PHY_CTRL);
Define "1".
>> Sure Manivannan.
Thanks,
Mani
next prev parent reply other threads:[~2022-02-15 10:33 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-02-01 18:07 [PATCH v2] PCI: qcom: Add system PM support Prasad Malisetty
2022-02-01 18:39 ` Bjorn Helgaas
2022-02-11 9:14 ` Manivannan Sadhasivam
2022-02-15 10:33 ` Prasad Malisetty (Temp) (QUIC) [this message]
2022-02-17 10:23 ` Prasad Malisetty
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=CO1PR02MB85376D985B785B9AEF4F4426E9349@CO1PR02MB8537.namprd02.prod.outlook.com \
--to=quic_pmaliset@quicinc.com \
--cc=agross@kernel.org \
--cc=bhelgaas@google.com \
--cc=bjorn.andersson@linaro.org \
--cc=kw@linux.com \
--cc=linux-arm-msm@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-pci@vger.kernel.org \
--cc=lorenzo.pieralisi@arm.com \
--cc=manivannan.sadhasivam@linaro.org \
--cc=quic_ramkri@quicinc.com \
--cc=quic_vbadigan@quicinc.com \
--cc=robh@kernel.org \
--cc=swboyd@chromium.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).