From: "Z.Q. Hou" <zhiqiang.hou@nxp.com>
To: "linux-pci@vger.kernel.org" <linux-pci@vger.kernel.org>,
"bhelgaas@google.com" <bhelgaas@google.com>
Cc: "lpieralisi@kernel.org" <lpieralisi@kernel.org>
Subject: RE: [PATCH] PCI: Align MPS to upstream bridge for SAFE and PERFORMANCE mode
Date: Wed, 13 Jul 2022 10:21:25 +0000 [thread overview]
Message-ID: <DB9PR04MB9236E2138DB733AFE1554C0884899@DB9PR04MB9236.eurprd04.prod.outlook.com> (raw)
In-Reply-To: <20220610150131.6256-1-Zhiqiang.Hou@nxp.com>
Hi Bjorn and Lorenzo,
Any comments on this change?
-----Original Message-----
From: Z.Q. Hou <zhiqiang.hou@nxp.com>
Sent: 2022年6月10日 23:02
To: linux-pci@vger.kernel.org; bhelgaas@google.com
Cc: Z.Q. Hou <zhiqiang.hou@nxp.com>
Subject: [PATCH] PCI: Align MPS to upstream bridge for SAFE and PERFORMANCE mode
From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
The commit 27d868b5e6cf ("PCI: Set MPS to match upstream bridge") made the device's MPS matches upstream bridge for PCIE_BUS_DEFAULT mode, so that it's more likely that a hot-added device will work in a system with an optimized MPS configuration.
Obviously, the Linux itself optimizes the MPS settings in the PCIE_BUS_SAFE and PCIE_BUS_PERFORMANCE mode, so let's do this also for these modes.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
---
drivers/pci/probe.c | 6 ++++--
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c index 17a969942d37..2c5a1aefd9cb 100644
--- a/drivers/pci/probe.c
+++ b/drivers/pci/probe.c
@@ -2034,7 +2034,9 @@ static void pci_configure_mps(struct pci_dev *dev)
* Fancier MPS configuration is done later by
* pcie_bus_configure_settings()
*/
- if (pcie_bus_config != PCIE_BUS_DEFAULT)
+ if (pcie_bus_config != PCIE_BUS_DEFAULT &&
+ pcie_bus_config != PCIE_BUS_SAFE &&
+ pcie_bus_config != PCIE_BUS_PERFORMANCE)
return;
mpss = 128 << dev->pcie_mpss;
@@ -2047,7 +2049,7 @@ static void pci_configure_mps(struct pci_dev *dev)
rc = pcie_set_mps(dev, p_mps);
if (rc) {
- pci_warn(dev, "can't set Max Payload Size to %d; if necessary, use \"pci=pcie_bus_safe\" and report a bug\n",
+ pci_warn(dev, "can't set Max Payload Size to %d; if necessary, use
+\"pci=pcie_bus_peer2peer\" and report a bug\n",
p_mps);
return;
}
--
2.17.1
Thanks,
Zhiqiang
next prev parent reply other threads:[~2022-07-13 10:21 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-06-10 15:01 [PATCH] PCI: Align MPS to upstream bridge for SAFE and PERFORMANCE mode Zhiqiang Hou
2022-07-13 10:21 ` Z.Q. Hou [this message]
2022-08-26 15:49 ` Tyler Hicks
2022-09-14 14:41 ` Tyler Hicks
2022-10-13 3:48 ` Tyler Hicks
2022-10-19 18:25 ` Tyler Hicks
2022-10-19 18:30 ` Keith Busch
2022-10-20 20:24 ` Bjorn Helgaas
2022-10-25 5:07 ` Tyler Hicks
2022-10-27 22:51 ` Bjorn Helgaas
2022-11-03 22:14 ` Bjorn Helgaas
2022-11-09 23:41 ` Tyler Hicks (Microsoft)
2023-01-04 0:14 ` Tyler Hicks
2022-11-13 18:39 ` Z.Q. Hou
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