linux-pci.vger.kernel.org archive mirror
 help / color / mirror / Atom feed
From: "Z.q. Hou" <zhiqiang.hou@nxp.com>
To: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: "linux-pci@vger.kernel.org" <linux-pci@vger.kernel.org>,
	"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	"bhelgaas@google.com" <bhelgaas@google.com>,
	"robh+dt@kernel.org" <robh+dt@kernel.org>,
	"shawnguo@kernel.org" <shawnguo@kernel.org>,
	Leo Li <leoyang.li@nxp.com>,
	"gustavo.pimentel@synopsys.com" <gustavo.pimentel@synopsys.com>,
	"M.h. Lian" <minghuan.lian@nxp.com>,
	Mingkai Hu <mingkai.hu@nxp.com>, Roy Zang <roy.zang@nxp.com>
Subject: RE: [PATCH 0/7] PCI: layerscape: Add power management support
Date: Wed, 24 Mar 2021 04:10:21 +0000	[thread overview]
Message-ID: <HE1PR0402MB3371214795F5063073B28F1484639@HE1PR0402MB3371.eurprd04.prod.outlook.com> (raw)
In-Reply-To: <20210323111524.GD29286@e121166-lin.cambridge.arm.com>

Hi Lorenzo,

> -----Original Message-----
> From: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
> Sent: 2021年3月23日 19:15
> To: Z.q. Hou <zhiqiang.hou@nxp.com>
> Cc: linux-pci@vger.kernel.org; devicetree@vger.kernel.org;
> linux-kernel@vger.kernel.org; bhelgaas@google.com; robh+dt@kernel.org;
> shawnguo@kernel.org; Leo Li <leoyang.li@nxp.com>;
> gustavo.pimentel@synopsys.com; M.h. Lian <minghuan.lian@nxp.com>;
> Mingkai Hu <mingkai.hu@nxp.com>; Roy Zang <roy.zang@nxp.com>
> Subject: Re: [PATCH 0/7] PCI: layerscape: Add power management support
> 
> On Mon, Sep 07, 2020 at 01:37:54PM +0800, Zhiqiang Hou wrote:
> > From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
> >
> > This patch series is to add PCIe power management support for NXP
> > Layerscape platfroms.
> >
> > Hou Zhiqiang (7):
> >   PCI: dwc: Fix a bug of the case dw_pci->ops is NULL
> >   PCI: layerscape: Change to use the DWC common link-up check
> function
> >   dt-bindings: pci: layerscape-pci: Add a optional property big-endian
> >   arm64: dts: layerscape: Add big-endian property for PCIe nodes
> >   dt-bindings: pci: layerscape-pci: Update the description of SCFG
> >     property
> >   dts: arm64: ls1043a: Add SCFG phandle for PCIe nodes
> >   PCI: layerscape: Add power management support
> >
> >  .../bindings/pci/layerscape-pci.txt           |   6 +-
> >  .../arm64/boot/dts/freescale/fsl-ls1012a.dtsi |   1 +
> >  .../arm64/boot/dts/freescale/fsl-ls1043a.dtsi |   6 +
> >  .../arm64/boot/dts/freescale/fsl-ls1046a.dtsi |   3 +
> >  drivers/pci/controller/dwc/pci-layerscape.c   | 473
> ++++++++++++++----
> >  drivers/pci/controller/dwc/pcie-designware.c  |  12 +-
> >  drivers/pci/controller/dwc/pcie-designware.h  |   1 +
> >  7 files changed, 388 insertions(+), 114 deletions(-)
> 
> I don't know which patches are still applicable, I will mark this series as
> superseded since you will have to rebase it anyway - please let me know
> what's the plan.

I'll rebase this series on the latest base.

Thanks,
Zhiqiang

> 
> Thanks,
> Lorenzo

      reply	other threads:[~2021-03-24  4:11 UTC|newest]

Thread overview: 24+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-09-07  5:37 [PATCH 0/7] PCI: layerscape: Add power management support Zhiqiang Hou
2020-09-07  5:37 ` [PATCH 1/7] PCI: dwc: Fix a bug of the case dw_pci->ops is NULL Zhiqiang Hou
2020-09-09  9:28   ` Gustavo Pimentel
2020-09-13 16:17     ` Z.q. Hou
2020-09-15  1:16   ` Rob Herring
2020-09-15  3:39     ` Z.q. Hou
2020-09-07  5:37 ` [PATCH 2/7] PCI: layerscape: Change to use the DWC common link-up check function Zhiqiang Hou
2020-09-15  1:19   ` Rob Herring
2020-09-15  6:22     ` Z.q. Hou
2020-09-07  5:37 ` [PATCH 3/7] dt-bindings: pci: layerscape-pci: Add a optional property big-endian Zhiqiang Hou
2020-09-15  1:30   ` Rob Herring
2020-09-15  3:39     ` Z.q. Hou
2020-09-07  5:37 ` [PATCH 4/7] arm64: dts: layerscape: Add big-endian property for PCIe nodes Zhiqiang Hou
2020-09-07  5:37 ` [PATCH 5/7] dt-bindings: pci: layerscape-pci: Update the description of SCFG property Zhiqiang Hou
2020-09-15  1:31   ` Rob Herring
2020-09-15  3:39     ` Z.q. Hou
2020-09-07  5:38 ` [PATCH 6/7] dts: arm64: ls1043a: Add SCFG phandle for PCIe nodes Zhiqiang Hou
2020-09-21 13:16   ` Shawn Guo
2020-09-21 16:46     ` Z.q. Hou
2020-09-07  5:38 ` [PATCH 7/7] PCI: layerscape: Add power management support Zhiqiang Hou
2020-09-15  1:30   ` Rob Herring
2020-09-15  6:44     ` Z.q. Hou
2021-03-23 11:15 ` [PATCH 0/7] " Lorenzo Pieralisi
2021-03-24  4:10   ` Z.q. Hou [this message]

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=HE1PR0402MB3371214795F5063073B28F1484639@HE1PR0402MB3371.eurprd04.prod.outlook.com \
    --to=zhiqiang.hou@nxp.com \
    --cc=bhelgaas@google.com \
    --cc=devicetree@vger.kernel.org \
    --cc=gustavo.pimentel@synopsys.com \
    --cc=leoyang.li@nxp.com \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-pci@vger.kernel.org \
    --cc=lorenzo.pieralisi@arm.com \
    --cc=minghuan.lian@nxp.com \
    --cc=mingkai.hu@nxp.com \
    --cc=robh+dt@kernel.org \
    --cc=roy.zang@nxp.com \
    --cc=shawnguo@kernel.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).