From: "Z.q. Hou" <zhiqiang.hou@nxp.com>
To: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: "linux-pci@vger.kernel.org" <linux-pci@vger.kernel.org>,
"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"linux-arm-kernel@lists.infradead.org"
<linux-arm-kernel@lists.infradead.org>,
"linuxppc-dev@lists.ozlabs.org" <linuxppc-dev@lists.ozlabs.org>,
"robh+dt@kernel.org" <robh+dt@kernel.org>,
"bhelgaas@google.com" <bhelgaas@google.com>,
"shawnguo@kernel.org" <shawnguo@kernel.org>,
Leo Li <leoyang.li@nxp.com>, "kishon@ti.com" <kishon@ti.com>,
"gustavo.pimentel@synopsys.com" <gustavo.pimentel@synopsys.com>,
Roy Zang <roy.zang@nxp.com>,
"jingoohan1@gmail.com" <jingoohan1@gmail.com>,
"andrew.murray@arm.com" <andrew.murray@arm.com>,
Mingkai Hu <mingkai.hu@nxp.com>,
"M.h. Lian" <minghuan.lian@nxp.com>
Subject: RE: [PATCHv7 00/12]PCI: dwc: Add the multiple PF support for DWC and Layerscape
Date: Fri, 18 Sep 2020 02:55:06 +0000 [thread overview]
Message-ID: <HE1PR0402MB3371BBECB380694B02EDB35B843F0@HE1PR0402MB3371.eurprd04.prod.outlook.com> (raw)
In-Reply-To: <20200917162017.GA6830@e121166-lin.cambridge.arm.com>
Hi Lorenzo,
Thanks a lot for your comments!
> -----Original Message-----
> From: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
> Sent: 2020年9月18日 0:20
> To: Z.q. Hou <zhiqiang.hou@nxp.com>
> Cc: linux-pci@vger.kernel.org; devicetree@vger.kernel.org;
> linux-kernel@vger.kernel.org; linux-arm-kernel@lists.infradead.org;
> linuxppc-dev@lists.ozlabs.org; robh+dt@kernel.org; bhelgaas@google.com;
> shawnguo@kernel.org; Leo Li <leoyang.li@nxp.com>; kishon@ti.com;
> gustavo.pimentel@synopsys.com; Roy Zang <roy.zang@nxp.com>;
> jingoohan1@gmail.com; andrew.murray@arm.com; Mingkai Hu
> <mingkai.hu@nxp.com>; M.h. Lian <minghuan.lian@nxp.com>
> Subject: Re: [PATCHv7 00/12]PCI: dwc: Add the multiple PF support for DWC
> and Layerscape
>
> On Tue, Aug 11, 2020 at 05:54:29PM +0800, Zhiqiang Hou wrote:
> > From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
> >
> > Add the PCIe EP multiple PF support for DWC and Layerscape, and use a
> > list to manage the PFs of each PCIe controller; add the doorbell MSIX
> > function for DWC; and refactor the Layerscape EP driver due to some
> > difference in Layercape platforms PCIe integration.
> >
> > Hou Zhiqiang (1):
> > misc: pci_endpoint_test: Add driver data for Layerscape PCIe
> > controllers
> >
> > Xiaowei Bao (11):
> > PCI: designware-ep: Add multiple PFs support for DWC
> > PCI: designware-ep: Add the doorbell mode of MSI-X in EP mode
> > PCI: designware-ep: Move the function of getting MSI capability
> > forward
> > PCI: designware-ep: Modify MSI and MSIX CAP way of finding
> > dt-bindings: pci: layerscape-pci: Add compatible strings for ls1088a
> > and ls2088a
> > PCI: layerscape: Fix some format issue of the code
> > PCI: layerscape: Modify the way of getting capability with different
> > PEX
> > PCI: layerscape: Modify the MSIX to the doorbell mode
> > PCI: layerscape: Add EP mode support for ls1088a and ls2088a
> > arm64: dts: layerscape: Add PCIe EP node for ls1088a
> > misc: pci_endpoint_test: Add LS1088a in pci_device_id table
> >
> > .../bindings/pci/layerscape-pci.txt | 2 +
> > .../arm64/boot/dts/freescale/fsl-ls1088a.dtsi | 31 +++
> > drivers/misc/pci_endpoint_test.c | 8 +-
> > .../pci/controller/dwc/pci-layerscape-ep.c | 100 +++++--
> > .../pci/controller/dwc/pcie-designware-ep.c | 258
> ++++++++++++++----
> > drivers/pci/controller/dwc/pcie-designware.c | 59 ++--
> > drivers/pci/controller/dwc/pcie-designware.h | 48 +++-
> > 7 files changed, 410 insertions(+), 96 deletions(-)
>
> Side note: I will change it for you but please keep Signed-off-by:
> tags together in the log instead of mixing them with other tags randomly.
>
> Can you rebase this series against my pci/dwc branch please and send a v8 ?
>
> I will apply it then.
I'll rebase this series and put the Signed-off-by tags together today.
Regards,
Zhiqiang
>
> Thanks,
> Lorenzo
prev parent reply other threads:[~2020-09-18 2:55 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-08-11 9:54 [PATCHv7 00/12]PCI: dwc: Add the multiple PF support for DWC and Layerscape Zhiqiang Hou
2020-08-11 9:54 ` [PATCHv7 01/12] PCI: designware-ep: Add multiple PFs support for DWC Zhiqiang Hou
2020-08-11 9:54 ` [PATCHv7 02/12] PCI: designware-ep: Add the doorbell mode of MSI-X in EP mode Zhiqiang Hou
2020-09-10 17:58 ` Rob Herring
2020-09-13 16:28 ` Z.q. Hou
2020-08-11 9:54 ` [PATCHv7 03/12] PCI: designware-ep: Move the function of getting MSI capability forward Zhiqiang Hou
2020-08-11 9:54 ` [PATCHv7 04/12] PCI: designware-ep: Modify MSI and MSIX CAP way of finding Zhiqiang Hou
2020-09-10 18:10 ` Rob Herring
2020-09-13 17:24 ` Z.q. Hou
2020-09-18 8:15 ` Z.q. Hou
2020-08-11 9:54 ` [PATCHv7 05/12] dt-bindings: pci: layerscape-pci: Add compatible strings for ls1088a and ls2088a Zhiqiang Hou
2020-08-11 9:54 ` [PATCHv7 06/12] PCI: layerscape: Fix some format issue of the code Zhiqiang Hou
2020-08-11 9:54 ` [PATCHv7 07/12] PCI: layerscape: Modify the way of getting capability with different PEX Zhiqiang Hou
2020-08-11 9:54 ` [PATCHv7 08/12] PCI: layerscape: Modify the MSIX to the doorbell mode Zhiqiang Hou
2020-08-11 9:54 ` [PATCHv7 09/12] PCI: layerscape: Add EP mode support for ls1088a and ls2088a Zhiqiang Hou
2020-08-11 9:54 ` [PATCHv7 10/12] arm64: dts: layerscape: Add PCIe EP node for ls1088a Zhiqiang Hou
2020-09-10 16:47 ` Rob Herring
2020-09-13 16:26 ` Z.q. Hou
2020-08-11 9:54 ` [PATCHv7 11/12] misc: pci_endpoint_test: Add LS1088a in pci_device_id table Zhiqiang Hou
2020-08-11 9:54 ` [PATCHv7 12/12] misc: pci_endpoint_test: Add driver data for Layerscape PCIe controllers Zhiqiang Hou
2020-09-10 18:17 ` Rob Herring
2020-09-13 17:24 ` Z.q. Hou
2020-09-17 16:20 ` [PATCHv7 00/12]PCI: dwc: Add the multiple PF support for DWC and Layerscape Lorenzo Pieralisi
2020-09-18 2:55 ` Z.q. Hou [this message]
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