From: Jingoo Han <jingoohan1@gmail.com>
To: Rob Herring <robh@kernel.org>,
Marek Szyprowski <m.szyprowski@samsung.com>
Cc: linux-samsung-soc <linux-samsung-soc@vger.kernel.org>,
PCI <linux-pci@vger.kernel.org>,
"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
Jaehoon Chung <jh80.chung@samsung.com>,
Krzysztof Kozlowski <krzk@kernel.org>,
Bjorn Helgaas <bhelgaas@google.com>,
Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
Vinod Koul <vkoul@kernel.org>,
Kishon Vijay Abraham I <kishon@ti.com>,
Han Jingoo <jingoohan1@gmail.com>
Subject: Re: [PATCH v3 2/6] dt-bindings: pci: add the samsung,exynos-pcie binding
Date: Thu, 5 Nov 2020 17:14:49 +0000 [thread overview]
Message-ID: <SLXP216MB0477D362203645C619958647AAEE0@SLXP216MB0477.KORP216.PROD.OUTLOOK.COM> (raw)
In-Reply-To: <CAL_JsqKQstKa7_0pjcODyyLCwMiGF9zB4_+x=GhcSUOyvuLRmw@mail.gmail.com>
On 11/5/20, 10:27 AM, Rob Herring wrote:
>
> On Thu, Nov 5, 2020 at 2:33 AM Marek Szyprowski
> <m.szyprowski@samsung.com> wrote:
> >
> > Hi Rob,
> >
> > On 04.11.2020 22:35, Rob Herring wrote:
> > > On Thu, Oct 29, 2020 at 02:40:13PM +0100, Marek Szyprowski wrote:
> > >> Add dt-bindings for the Samsung Exynos PCIe controller (Exynos5433
> > >> variant). Based on the text dt-binding posted by Jaehoon Chung.
> > >>
> > >> Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
> > >> Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
> > >> ---
> > >> .../bindings/pci/samsung,exynos-pcie.yaml | 119 ++++++++++++++++++
> > >> 1 file changed, 119 insertions(+)
> > >> create mode 100644 Documentation/devicetree/bindings/pci/samsung,exynos-pcie.yaml
> >
> > >> ...
> >
> > >> + num-viewport:
> > >> + const: 3
> > > I'm confused why you need this. This is only used with the iATU except
> > > for keystone. Platforms like Exynos with their own child bus config
> > > space accessors don't have an iATU.
> >
> > Frankly I have no idea, I don't know much about the PCI internals.
>
> Sorry, I was confused. It's fine.
I was confused, too. But, as far as I remember, I also think that viewpoint-related
setting was necessary for Exynos PCIe.
Thank you.
Best regards,
Jingoo Han
>
> Reviewed-by: Rob Herring <robh@kernel.org>
>
> Rob
next prev parent reply other threads:[~2020-11-05 17:15 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <CGME20201029134037eucas1p17f861adc0858e8a80d516dc0f2733f84@eucas1p1.samsung.com>
2020-10-29 13:40 ` [PATCH v3 0/6] Add DW PCIe support for Exynos5433 SoCs Marek Szyprowski
[not found] ` <CGME20201029134037eucas1p275bad9fe08eff145711cc36ac8c685f7@eucas1p2.samsung.com>
2020-10-29 13:40 ` [PATCH v3 1/6] dt-bindings: pci: drop samsung,exynos5440-pcie binding Marek Szyprowski
[not found] ` <CGME20201029134038eucas1p28d9bd33bc9e36b960b021a40ef299b47@eucas1p2.samsung.com>
2020-10-29 13:40 ` [PATCH v3 2/6] dt-bindings: pci: add the samsung,exynos-pcie binding Marek Szyprowski
2020-11-04 21:35 ` Rob Herring
2020-11-05 8:33 ` Marek Szyprowski
2020-11-05 15:27 ` Rob Herring
2020-11-05 17:14 ` Jingoo Han [this message]
[not found] ` <CGME20201029134038eucas1p2d550a45ff3222ccb72d15d5c89d4f938@eucas1p2.samsung.com>
2020-10-29 13:40 ` [PATCH v3 3/6] dt-bindings: phy: add the samsung,exynos-pcie-phy binding Marek Szyprowski
2020-11-04 21:39 ` Rob Herring
[not found] ` <CGME20201029134039eucas1p2270e5f4ecea05b17f4d9107300ce946d@eucas1p2.samsung.com>
2020-10-29 13:40 ` [PATCH v3 4/6] phy: samsung: phy-exynos-pcie: rework driver to support Exynos5433 PCIe PHY Marek Szyprowski
[not found] ` <CGME20201029134040eucas1p1d9ab30c75ac9243346b4786e7048d6be@eucas1p1.samsung.com>
2020-10-29 13:40 ` [PATCH v3 5/6] pci: dwc: pci-exynos: rework the driver to support Exynos5433 variant Marek Szyprowski
2020-10-29 21:59 ` Jingoo Han
2020-11-04 21:39 ` Rob Herring
[not found] ` <CGME20201029134040eucas1p2a8958b44842a8a4647e3aa4521c75725@eucas1p2.samsung.com>
2020-10-29 13:40 ` [PATCH v3 6/6] arm64: dts: exynos: add the WiFi/PCIe support to TM2(e) boards Marek Szyprowski
2020-11-05 19:14 ` Krzysztof Kozlowski
2020-11-03 22:44 ` [PATCH v3 0/6] Add DW PCIe support for Exynos5433 SoCs Bjorn Helgaas
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=SLXP216MB0477D362203645C619958647AAEE0@SLXP216MB0477.KORP216.PROD.OUTLOOK.COM \
--to=jingoohan1@gmail.com \
--cc=bhelgaas@google.com \
--cc=devicetree@vger.kernel.org \
--cc=jh80.chung@samsung.com \
--cc=kishon@ti.com \
--cc=krzk@kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-pci@vger.kernel.org \
--cc=linux-samsung-soc@vger.kernel.org \
--cc=lorenzo.pieralisi@arm.com \
--cc=m.szyprowski@samsung.com \
--cc=robh@kernel.org \
--cc=vkoul@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).