From: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
To: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: "marek.vasut+renesas@gmail.com" <marek.vasut+renesas@gmail.com>,
"linux-pci@vger.kernel.org" <linux-pci@vger.kernel.org>,
"linux-renesas-soc@vger.kernel.org"
<linux-renesas-soc@vger.kernel.org>,
Geert Uytterhoeven <geert@linux-m68k.org>
Subject: RE: [PATCH v4 2/2] PCI: rcar: Fix missing MACCTLR register setting in initialize sequence
Date: Wed, 13 Nov 2019 01:34:51 +0000 [thread overview]
Message-ID: <TYAPR01MB454416AA6EAFDA8BF5024330D8760@TYAPR01MB4544.jpnprd01.prod.outlook.com> (raw)
In-Reply-To: <20191112112510.GA15159@e121166-lin.cambridge.arm.com>
Hi Lorenzo,
> From: Lorenzo Pieralisi, Sent: Tuesday, November 12, 2019 8:25 PM
>
> On Tue, Nov 12, 2019 at 11:46:42AM +0100, Geert Uytterhoeven wrote:
> > Hi Lorenzo,
> >
> > On Tue, Nov 12, 2019 at 11:27 AM Lorenzo Pieralisi
> > <lorenzo.pieralisi@arm.com> wrote:
> > > On Tue, Nov 12, 2019 at 01:48:03AM +0000, Yoshihiro Shimoda wrote:
> > > > I'm sorry. I think I should not drop a sentence "because the bit 0 is
> > > > set to 1 on reset" which has the reverted patch from this version. Also,
> > > > the note seems to be difficult to understand. So, I'll rewrite this log
> > > > like below. Is it acceptable?
> > > >
> > > > ---
> > > > According to the R-Car Gen2/3 manual,
> > >
> > > Is this a publicly available manual ? If yes we provide a link, if
> > > not I will reword the sentence below.
> >
> > The same hardware block is present in the RZ/G series, and documented
> > in RZ/G Series User's Manual: Hardware
> > https://www.renesas.com/eu/en/products/microcontrollers-microprocessors/rz/rzg/rzg1m.html#documents
> > Chapter 39 ("PCIEC").
> > Section 39.28.98 ("MAC Control Register (MACCTLR)")
> > Section 39.3.1 ("Initialization"), Paragraph 3 ("Initial Setting of
> > PCI Express").
> >
> > Thanks, and happy digesting ;-)
>
> Thank you, updated commit log and pushed out, pci/rcar branch.
Thank you very much for updating the commit log. It's very clear than mine :)
Best regards,
Yoshihiro Shimoda
> Thanks,
> Lorenzo
prev parent reply other threads:[~2019-11-13 1:34 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-11-05 10:51 [PATCH v4 0/2] PCI: rcar: Fix missing MACCTLR register setting (take2) Yoshihiro Shimoda
2019-11-05 10:51 ` [PATCH v4 1/2] Revert "PCI: rcar: Fix missing MACCTLR register setting in rcar_pcie_hw_init()" Yoshihiro Shimoda
2019-11-11 14:38 ` Lorenzo Pieralisi
2019-11-12 1:26 ` Yoshihiro Shimoda
2019-11-05 10:51 ` [PATCH v4 2/2] PCI: rcar: Fix missing MACCTLR register setting in initialize sequence Yoshihiro Shimoda
2019-11-11 14:42 ` Lorenzo Pieralisi
2019-11-12 1:48 ` Yoshihiro Shimoda
2019-11-12 10:27 ` Lorenzo Pieralisi
2019-11-12 10:46 ` Geert Uytterhoeven
2019-11-12 11:25 ` Lorenzo Pieralisi
2019-11-13 1:34 ` Yoshihiro Shimoda [this message]
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