From: Christoph Hellwig <firstname.lastname@example.org>
To: Bjorn Helgaas <email@example.com>
Cc: Kai-Heng Feng <firstname.lastname@example.org>,
Joerg Roedel <email@example.com>,
"open list:PCI ENHANCED ERROR HANDLING (EEH) FOR POWERPC"
"open list:PCI SUBSYSTEM" <firstname.lastname@example.org>,
open list <email@example.com>,
Lalithambika Krishnakumar <firstname.lastname@example.org>,
Alex Williamson <email@example.com>,
Oliver O'Halloran <firstname.lastname@example.org>,
Bjorn Helgaas <email@example.com>,
Mika Westerberg <firstname.lastname@example.org>,
Lu Baolu <email@example.com>
Subject: Re: [PATCH 1/2] PCI/AER: Disable AER interrupt during suspend
Date: Fri, 23 Jul 2021 06:24:22 +0100 [thread overview]
Message-ID: <YPpShrTa448OpGjA@infradead.org> (raw)
On Thu, Jul 22, 2021 at 05:23:51PM -0500, Bjorn Helgaas wrote:
> Marking both of these as "not applicable" for now because I don't
> think we really understand what's going on.
> Apparently a DMA occurs during suspend or resume and triggers an ACS
> violation. I don't think think such a DMA should occur in the first
> Or maybe, since you say the problem happens right after ACS is enabled
> during resume, we're doing the ACS enable incorrectly? Although I
> would think we should not be doing DMA at the same time we're enabling
> ACS, either.
> If this really is a system firmware issue, both HP and Dell should
> have the knowledge and equipment to figure out what's going on.
DMA on resume sounds really odd. OTOH the below mentioned case of
a DMA during suspend seems very like in some setup. NVMe has the
concept of a host memory buffer (HMB) that allows the PCIe device
to use arbitrary host memory for internal purposes. Combine this
with the "Storage D3" misfeature in modern x86 platforms that force
a slot into d3cold without consulting the driver first and you'd see
symptoms like this. Another case would be the NVMe equivalent of the
AER which could lead to a completion without host activity.
We now have quirks in the ACPI layer and NVMe to fully shut down the
NVMe controllers on these messed up systems with the "Storage D3"
misfeature which should avoid such "spurious" DMAs at the cost of
wearning out the device much faster.
next prev parent reply other threads:[~2021-07-23 5:24 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-01-27 17:31 [PATCH 1/2] PCI/AER: Disable AER interrupt during suspend Kai-Heng Feng
2021-01-27 17:31 ` [PATCH 2/2] PCI/DPC: Disable DPC " Kai-Heng Feng
2021-01-27 20:50 ` [PATCH 1/2] PCI/AER: Disable AER " Bjorn Helgaas
2021-01-28 4:09 ` Kai-Heng Feng
2021-02-04 23:27 ` Bjorn Helgaas
2021-02-05 15:17 ` Kai-Heng Feng
2021-07-22 22:23 ` Bjorn Helgaas
2021-07-23 5:24 ` Christoph Hellwig [this message]
2021-07-23 7:05 ` Kai-Heng Feng
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