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From: Ira Weiny <ira.weiny@intel.com>
To: Davidlohr Bueso <dave@stgolabs.net>
Cc: Dan Williams <dan.j.williams@intel.com>,
	Bjorn Helgaas <bhelgaas@google.com>,
	Jonathan Cameron <Jonathan.Cameron@huawei.com>,
	"Ben Widawsky" <bwidawsk@kernel.org>,
	Alison Schofield <alison.schofield@intel.com>,
	Vishal Verma <vishal.l.verma@intel.com>,
	"Dave Jiang" <dave.jiang@intel.com>,
	<linux-kernel@vger.kernel.org>, <linux-cxl@vger.kernel.org>,
	<linux-pci@vger.kernel.org>, <a.manzanares@samsung.com>
Subject: Re: [PATCH v11 4/8] cxl/pci: Create PCI DOE mailbox's for memory devices
Date: Tue, 21 Jun 2022 11:24:56 -0700	[thread overview]
Message-ID: <YrIM+GnP+g0HbwaK@iweiny-desk3> (raw)
In-Reply-To: <20220617204046.qdkza6iemkfv2aze@offworld>

On Fri, Jun 17, 2022 at 01:40:46PM -0700, Davidlohr Bueso wrote:
> On Fri, 10 Jun 2022, ira.weiny@intel.com wrote:
> > +++ b/drivers/cxl/cxlmem.h
> > @@ -191,6 +191,8 @@ struct cxl_endpoint_dvsec_info {
> >  * @component_reg_phys: register base of component registers
> >  * @info: Cached DVSEC information about the device.
> >  * @serial: PCIe Device Serial Number
> 
> Missing doc:
> 
> @doe_use_irq: Use interrupt vectors for DOEs over polling.
> 
> However introducing such flags is not pretty, and this is only used by
> devm_cxl_pci_create_doe(). Do we really need it? See below.

Yes Dan had the same feedback to get rid of the member.

[snip]

> > +
> > static int cxl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
> > {
> > 	struct cxl_register_map map;
> > @@ -434,6 +545,9 @@ static int cxl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
> > 
> > 	cxlds->component_reg_phys = cxl_regmap_to_base(pdev, &map);
> > 
> > +	cxl_alloc_irq_vectors(cxlds);
> > +	devm_cxl_pci_create_doe(cxlds);
> 
> Should cxl_alloc_irq_vectors() just be called directly from devm_cxl_pci_create_doe()
> instead?

I was anticipating having to merge cxl_alloc_irq_vectors() with other code
which is supporting irq's for other things later on.  So I kept the 2 separate.
This is also why the use irq flag was in the device state.  The irq vector call
could have specified to use other types of irq's.  But those can be passed
directly as Dan suggested.

> Also if devm_cxl_pci_create_doe() fails (say ENOMEM), why do we
> bother continuing the cxl_pci probing?

Because the DOE is only required for CDAT data which is optional at this point.

Thanks for the suggested diff below.  But I'm going to go with Dan's suggestion
to use a flag which is set and passed between the functions.

Thanks for the review!
Ira

> 
> Thanks,
> Davidlohr
> 
> ------
> diff --git a/drivers/cxl/cxlmem.h b/drivers/cxl/cxlmem.h
> index ce5b00f3ebcb..44098c785a8b 100644
> --- a/drivers/cxl/cxlmem.h
> +++ b/drivers/cxl/cxlmem.h
> @@ -230,7 +230,6 @@ struct cxl_dev_state {
> 	resource_size_t component_reg_phys;
> 	u64 serial;
> 
> -	bool doe_use_irq;
> 	struct pci_doe_mb **doe_mbs;
> 	int num_mbs;
> 
> diff --git a/drivers/cxl/pci.c b/drivers/cxl/pci.c
> index 72c7b535f5df..47c3741f7768 100644
> --- a/drivers/cxl/pci.c
> +++ b/drivers/cxl/pci.c
> @@ -403,7 +403,7 @@ static void cxl_doe_destroy_mb(void *ds)
> 	}
>  }
> 
> -static void cxl_alloc_irq_vectors(struct cxl_dev_state *cxlds)
> +static int cxl_alloc_irq_vectors(struct cxl_dev_state *cxlds)
>  {
> 	struct device *dev = cxlds->dev;
> 	struct pci_dev *pdev = to_pci_dev(dev);
> @@ -421,9 +421,7 @@ static void cxl_alloc_irq_vectors(struct cxl_dev_state *cxlds)
> 	}
> 
> 	if (!max_irqs)
> -		return;
> -
> -	cxlds->doe_use_irq = false;
> +		return -ENOMEM;
> 
> 	/*
> 	 * Allocate enough vectors for the DOE's
> @@ -435,14 +433,10 @@ static void cxl_alloc_irq_vectors(struct cxl_dev_state *cxlds)
> 		/* Some got allocated; clean them up */
> 		if (rc > 0)
> 			cxl_pci_free_irq_vectors(pdev);
> -		return;
> +		return -ENOMEM;
> 	}
> 
> -	rc = devm_add_action_or_reset(dev, cxl_pci_free_irq_vectors, pdev);
> -	if (rc)
> -		return;
> -
> -	cxlds->doe_use_irq = true;
> +	return devm_add_action_or_reset(dev, cxl_pci_free_irq_vectors, pdev);
>  }
> 
>  /**
> @@ -457,6 +451,10 @@ static void devm_cxl_pci_create_doe(struct cxl_dev_state *cxlds)
> 	u16 off = 0;
> 	int num_mbs = 0;
> 	int rc;
> +	bool doe_use_irq = false;
> +
> +	if (cxl_alloc_irq_vectors(cxlds))
> +		doe_use_irq = true;
> 
> 	pci_doe_for_each_off(pdev, off)
> 		num_mbs++;
> @@ -475,7 +473,7 @@ static void devm_cxl_pci_create_doe(struct cxl_dev_state *cxlds)
> 		struct pci_doe_mb *doe_mb;
> 		int irq = -1;
> 
> -		if (cxlds->doe_use_irq)
> +		if (doe_use_irq)
> 			irq = pci_doe_get_irq_num(pdev, off);
> 
> 		doe_mb = pci_doe_create_mb(pdev, off, irq);
> @@ -545,7 +543,6 @@ static int cxl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
> 
> 	cxlds->component_reg_phys = cxl_regmap_to_base(pdev, &map);
> 
> -	cxl_alloc_irq_vectors(cxlds);
> 	devm_cxl_pci_create_doe(cxlds);
> 
> 	rc = cxl_pci_setup_mailbox(cxlds);

  parent reply	other threads:[~2022-06-21 18:25 UTC|newest]

Thread overview: 44+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-06-10 20:22 [PATCH V11 0/8] CXL: Read CDAT and DSMAS data ira.weiny
2022-06-10 20:22 ` [PATCH V11 1/8] PCI: Add vendor ID for the PCI SIG ira.weiny
2022-06-10 20:22 ` [PATCH V11 2/8] PCI: Replace magic constant for PCI Sig Vendor ID ira.weiny
2022-06-10 20:22 ` [PATCH V11 3/8] PCI: Create PCI library functions in support of DOE mailboxes ira.weiny
2022-06-14  3:53   ` Li, Ming
2022-06-15  4:18     ` Ira Weiny
2022-06-17 22:40   ` Bjorn Helgaas
2022-06-18 16:39     ` Bjorn Helgaas
2022-06-22 16:46       ` Ira Weiny
2022-06-20  9:24     ` Jonathan Cameron
2022-06-22 23:06       ` Ira Weiny
2022-06-22 16:38     ` Ira Weiny
2022-06-17 22:56   ` Dan Williams
2022-06-20 10:23     ` Jonathan Cameron
2022-06-22 22:57       ` Ira Weiny
2022-06-23 18:03         ` Dan Williams
2022-06-22 22:37     ` Ira Weiny
2022-06-22 22:45     ` Ira Weiny
2022-06-22 22:57       ` Dan Williams
2022-06-23  0:25         ` Ira Weiny
2022-06-23 10:24           ` Jonathan Cameron
2022-06-23 18:14             ` Dan Williams
2022-06-23 18:07           ` Dan Williams
2022-06-10 20:22 ` [PATCH V11 4/8] cxl/pci: Create PCI DOE mailbox's for memory devices ira.weiny
2022-06-17 20:40   ` [PATCH v11 " Davidlohr Bueso
2022-06-17 20:51     ` Davidlohr Bueso
2022-06-21 18:24     ` Ira Weiny [this message]
2022-06-17 23:44   ` [PATCH V11 " Dan Williams
2022-06-21 18:29     ` Ira Weiny
2022-06-22 23:18       ` Ira Weiny
2022-06-21 20:37   ` Bjorn Helgaas
2022-06-10 20:22 ` [PATCH V11 5/8] cxl/port: Read CDAT table ira.weiny
2022-06-18  0:43   ` Dan Williams
2022-06-21 19:10     ` Dan Williams
2022-06-21 19:34       ` Lukas Wunner
2022-06-21 19:41         ` Dan Williams
2022-06-21 20:38           ` Ira Weiny
2022-06-21 21:14     ` Ira Weiny
2022-06-21 21:48       ` Dan Williams
2022-06-28  3:24         ` Ira Weiny
2022-06-10 20:22 ` [PATCH V11 6/8] cxl/port: Introduce cxl_cdat_valid() ira.weiny
2022-06-10 20:22 ` [PATCH V11 7/8] cxl/port: Retry reading CDAT on failure ira.weiny
2022-06-28  3:32   ` Alison Schofield
2022-06-10 20:22 ` [PATCH V11 8/8] cxl/port: Parse out DSMAS data from CDAT table ira.weiny

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