From: Vinod Koul <vkoul@kernel.org>
To: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Cc: "Andy Gross" <agross@kernel.org>,
"Bjorn Andersson" <bjorn@kryo.se>,
"Konrad Dybcio" <konrad.dybcio@somainline.org>,
"Rob Herring" <robh+dt@kernel.org>,
"Jingoo Han" <jingoohan1@gmail.com>,
"Gustavo Pimentel" <gustavo.pimentel@synopsys.com>,
"Lorenzo Pieralisi" <lorenzo.pieralisi@arm.com>,
"Krzysztof Wilczyński" <kw@linux.com>,
"Bjorn Helgaas" <bhelgaas@google.com>,
"Kishon Vijay Abraham I" <kishon@ti.com>,
"Philipp Zabel" <p.zabel@pengutronix.de>,
"Johan Hovold" <johan@kernel.org>,
linux-arm-msm@vger.kernel.org, linux-pci@vger.kernel.org,
linux-phy@lists.infradead.org
Subject: Re: [PATCH v2 2/6] phy: qcom-qmp-pcie: split register tables into primary and secondary part
Date: Tue, 30 Aug 2022 12:43:54 +0530 [thread overview]
Message-ID: <Yw24sgVksGzvgr8Q@matsya> (raw)
In-Reply-To: <20220825105044.636209-3-dmitry.baryshkov@linaro.org>
On 25-08-22, 13:50, Dmitry Baryshkov wrote:
> SM8250 configuration tables are split into two parts: the common one and
> the PHY-specific tables. Make this split more formal. Rather than having
> a blind renamed copy of all QMP table fields, add separate struct
> qmp_phy_cfg_tables and add two instances of this structure to the struct
> qmp_phy_cfg. Later on this will be used to support different PHY modes
> (RC vs EP).
This lgtm with once nit
>
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
> ---
> drivers/phy/qualcomm/phy-qcom-qmp-pcie.c | 141 +++++++++++++----------
> 1 file changed, 83 insertions(+), 58 deletions(-)
>
> diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-pcie.c b/drivers/phy/qualcomm/phy-qcom-qmp-pcie.c
> index c84846020272..60cbd2eae346 100644
> --- a/drivers/phy/qualcomm/phy-qcom-qmp-pcie.c
> +++ b/drivers/phy/qualcomm/phy-qcom-qmp-pcie.c
> @@ -1346,34 +1346,33 @@ static const struct qmp_phy_init_tbl sm8450_qmp_gen4x2_pcie_pcs_misc_tbl[] = {
>
> struct qmp_phy;
>
> -/* struct qmp_phy_cfg - per-PHY initialization config */
> -struct qmp_phy_cfg {
> - /* phy-type - PCIE/UFS/USB */
> - unsigned int type;
> - /* number of lanes provided by phy */
> - int nlanes;
> -
> - /* Init sequence for PHY blocks - serdes, tx, rx, pcs */
> +struct qmp_phy_cfg_tables {
> const struct qmp_phy_init_tbl *serdes_tbl;
> int serdes_tbl_num;
> - const struct qmp_phy_init_tbl *serdes_tbl_sec;
> - int serdes_tbl_num_sec;
> const struct qmp_phy_init_tbl *tx_tbl;
> int tx_tbl_num;
> - const struct qmp_phy_init_tbl *tx_tbl_sec;
> - int tx_tbl_num_sec;
> const struct qmp_phy_init_tbl *rx_tbl;
> int rx_tbl_num;
> - const struct qmp_phy_init_tbl *rx_tbl_sec;
> - int rx_tbl_num_sec;
> const struct qmp_phy_init_tbl *pcs_tbl;
> int pcs_tbl_num;
> - const struct qmp_phy_init_tbl *pcs_tbl_sec;
> - int pcs_tbl_num_sec;
> const struct qmp_phy_init_tbl *pcs_misc_tbl;
> int pcs_misc_tbl_num;
> - const struct qmp_phy_init_tbl *pcs_misc_tbl_sec;
> - int pcs_misc_tbl_num_sec;
> +};
> +
> +/* struct qmp_phy_cfg - per-PHY initialization config */
> +struct qmp_phy_cfg {
> + /* phy-type - PCIE/UFS/USB */
> + unsigned int type;
> + /* number of lanes provided by phy */
> + int nlanes;
> +
> + /* Init sequence for PHY blocks - serdes, tx, rx, pcs */
> + struct qmp_phy_cfg_tables primary;
> + /*
> + * Init sequence for PHY blocks, providing additional register
> + * programming. Unless required it can be left omitted.
> + */
> + struct qmp_phy_cfg_tables secondary;
since this is optional but always defined, we would waste memory here,
can we make this a pointer and initialize to null when secondary is not
present
--
~Vinod
next prev parent reply other threads:[~2022-08-30 7:14 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-08-25 10:50 [PATCH v2 0/6] PCI: qcom: Support using the same PHY for both RC and EP Dmitry Baryshkov
2022-08-25 10:50 ` [PATCH v2 1/6] phy: qcom-qmp-pcie: drop if (table) conditions Dmitry Baryshkov
2022-08-25 10:50 ` [PATCH v2 2/6] phy: qcom-qmp-pcie: split register tables into primary and secondary part Dmitry Baryshkov
2022-08-30 7:13 ` Vinod Koul [this message]
2022-08-30 7:18 ` Dmitry Baryshkov
2022-08-30 7:38 ` Johan Hovold
2022-08-30 9:29 ` Dmitry Baryshkov
2022-08-25 10:50 ` [PATCH v2 3/6] phy: qcom-qmp-pcie: support separate tables for EP mode Dmitry Baryshkov
2022-08-25 10:50 ` [PATCH v2 4/6] PCI: qcom: Setup PHY to work in RC mode Dmitry Baryshkov
2022-08-25 10:50 ` [PATCH v2 5/6] PCI: qcom-ep: Setup PHY to work in EP mode Dmitry Baryshkov
2022-08-30 7:17 ` Vinod Koul
2022-08-25 10:50 ` [PATCH v2 6/6] phy: qcom-qmp-pcie: Support SM8450 PCIe1 PHY " Dmitry Baryshkov
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